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Inventor
FERKO ANDREW
US
4 patents
⚠️ This page may combine multiple inventors who share the name “FERKO ANDREW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
2 patents
US6782501B2
Aug 24, 2004
System for reducing test data volume in the testing of logic products
CADENCE DESIGN SYSTEMS INC
34 citations
89
US7103816B2
Sep 5, 2006
Method and system for reducing test data volume in the testing of logic products
CADENCE DESIGN SYSTEMS INC
4 citations
60
BASSETT ROBERT W
1 patent
US8209141B2
Jun 26, 2012
System and method for automatically generating test patterns for at-speed structural test of an integrated circuit device using an incremental approach to reduce test pattern count
BASSETT ROBERT W
7 citations
76
IBM
1 patent
US7900112B2
Mar 1, 2011
System and method for digital logic testing
IBM
4 citations
54