Inventor

HURWITZ PAUL D

US44 patents

⚠️ This page may combine multiple inventors who share the name “HURWITZ PAUL D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HURWITZ PAUL D

NEWPORT FAB LLC

Method to fabricate both FD-SOI and PD-SOI devices within a single integrated circuit

RF switch branch having improved linearity

Bent polysilicon gate structure for small footprint radio frequency (RF) switch

Method for integrating SiGe NPN and vertical PNP devices on a substrate and related structure

Substrate isolation for low-loss radio frequency (RF) circuits

Copper interconnect for improving radio frequency (RF) silicon-on-insulator (SOI) switch field effect transistor (FET) stacks

Reduced substrate effects in monolithically integrated RF circuits

Integrated passive device having improved linearity and isolation

Power handling improvements for phase-change material (PCM) radio frequency (RF) switch circuits

Radio frequency (RF) switch with improved power handling

Dynamic impedance circuit for uniform voltage distribution in a high power switch branch

Non-linear shunt circuit for third order harmonic reduction in RF switches

High power RF switches using multiple optimized transistors

Linearity and lateral isolation in a BiCMOS process through counter-doping of epitaxial silicon region

Body-source-tied semiconductor-on-insulator (SOI) transistor

Method for forming a semiconductor structure having a porous semiconductor layer in RF devices

Semiconductor structure having porous semiconductor segment for RF devices and bulk semiconductor region for non-RF devices

Semiconductor-on-insulator (SOI) device with reduced parasitic capacitance

Semiconductor structure having porous semiconductor layer for RF devices

High performance SiGe heterojunction bipolar transistors built on thin-film silicon-on-insulator substrates for radio frequency applications

Stacked phase-change material (PCM) radio frequency (RF) switches with improved RF power handling

High power RF switches using multiple optimized transistors and methods for fabricating same

Bulk CMOS RF switch with reduced parasitic capacitance

Selective amorphization for electrical signal isolation and linearity in SOI structures

Substrate isolation for low-loss radio frequency (RF) circuits

Body-source-tied transistor

Method for manufacturing body-source-tied SOI transistor

Field effect transistors with reduced leakage current

High performance SiGe heterojunction bipolar transistors built on thin film silicon-on-insulator substrates for radio frequency applications

Structure and method for mitigating substrate parasitics in bulk high resistivity substrate technology

Structure and method for reducing substrate parasitics in semiconductor on insulator technology

Bulk CMOS RF switch with reduced parasitic capacitance

Selective amorphization for signal isolation and linearity

Semiconductor device having reduced drain-to-source capacitance

SOI structure and method for utilizing trenches for signal isolation and linearity

SOI structure for signal isolation and linearity

Electrical signal isolation in semiconductor structures

Method for integrating SiGe NPN and vertical PNP devices

Integration of SiGe NPN and vertical PNP devices on a substrate

Linearity and lateral isolation in a BiCMOS process through counter-doping of epitaxial silicon region

TOWER SEMICONDUCTOR LTD

Hybrid MOS-PCM CMOS SOI switch

NEWPORT FAB LLC DBA JAZZ SEMICONDUCTOR

Isolated through silicon vias in RF technologies

HURWITZ PAUL D

Electrical signal isolation and linearity in SOI structures

NEWPORT FAB LLC DBA JAZZ SEMICONDUCTOR INC

Wide contact structure for small footprint radio frequency (RF) switch