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Inventor
GHOSHTAGORE RATHINDRA N
US
2 patents
Patents
2 patents
US4532702A
Aug 6, 1985
Method of forming conductive interconnection between vertically spaced levels in VLSI devices
WESTINGHOUSE ELECTRIC CORP
37 citations
87
US5110755A
May 5, 1992
Process for forming a component insulator on a silicon substrate
WESTINGHOUSE ELECTRIC CORP
23 citations
86