Inventor · disambiguated record
Siu-Han Liao
Also filed as: LIAO SIU-HAN
8 granted patents·221 citations·filing 1995–1998
89Inventor score
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8 records- 0181US5840607AMethod of forming undoped/in-situ doped/undoped polysilicon sandwich for floating gate applicationTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Nov 24, 1998·60 cites·19 claims
- 0277US5652156ALayered polysilicon deposition methodTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Jul 29, 1997·58 cites·37 claims
- 0367US5966601AMethod of making non-volatile semiconductor memory arraysHOLTEK MICROELECTRONICS INC·Filed 1997·Granted Oct 12, 1999·29 cites·7 claims
- 0467US5480830AMethod of making depleted gate transistor for high voltage operationTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Jan 2, 1996·33 cites·18 claims
- 0555US5637903ADepleted gate transistor for high voltage operationTAIWAN SEMICONDUCTOR MFG·Filed 1995·Granted Jun 10, 1997·19 cites·2 claims
- 0649US5652162AMethod for fabricating flat ROM devices using memory array cells with concave channelsTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Jul 29, 1997·10 cites·25 claims
- 0745US5999443ALow-voltage triple-well non-volatile semiconductor memoryHOLTEK SEMICONDUCTOR INC·Filed 1998·Granted Dec 7, 1999·10 cites·4 claims
- 0832US5990525AROM device structure comprised of ROM memory array cells, featuring concave channel regionsTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Nov 23, 1999·2 cites·1 claims
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