Inventor
KINGSLEY CHRISTOPHER H
US31 patents
⚠️ This page may combine multiple inventors who share the name “KINGSLEY CHRISTOPHER H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
13 patentsUS6882182B1Apr 19, 2005
Tunable clock distribution system for reducing power dissipation
XILINX INC102 citations98
US6219305B1Apr 17, 2001
Method and system for measuring signal propagation delays using ring oscillators
XILINX INC91 citations98
US6452459B1Sep 17, 2002
Circuit for measuring signal delays of synchronous memory elements
XILINX INC43 citations92
US6232845B1May 15, 2001
Circuit for measuring signal delays in synchronous memory elements
XILINX INC49 citations92
US6144262ANov 7, 2000
Circuit for measuring signal delays of asynchronous register inputs
XILINX INC39 citations92
US6075418AJun 13, 2000
System with downstream set or clear for measuring signal propagation delays on integrated circuits
XILINX INC49 citations92
US6069849AMay 30, 2000
Method and system for measuring signal propagation delays using the duty cycle of a ring oscillator
XILINX INC37 citations92
US7795901B1Sep 14, 2010
Automatic isolation of a defect in a programmable logic device
XILINX INC14 citations84
US8671379B1Mar 11, 2014
Multi-threaded deterministic router
XILINX INC6 citations81
US8386983B1Feb 26, 2013
Parallel signal routing
XILINX INC5 citations69
US7482886B1Jan 27, 2009
System for measuring propagation delays
XILINX INC6 citations63
US7373560B1May 13, 2008
Circuit for measuring signal delays of asynchronous inputs of synchronous elements
XILINX INC6 citations57
US7765511B1Jul 27, 2010
Compensation for performance variation in integrated circuits
XILINX INC1 citations49
ALTERYX INC
10 patentsUS11630716B2Apr 18, 2023
Error handling during asynchronous processing of sequential data blocks
ALTERYX INC2 citations70
US11061754B2Jul 13, 2021
Error handling during asynchronous processing of sequential data blocks
ALTERYX INC0 citations60
US11494409B2Nov 8, 2022
Asynchronously processing sequential data blocks
ALTERYX INC0 citations59
US10996855B2May 4, 2021
Memory allocation in a data analytics system
ALTERYX INC0 citations59
US10552452B2Feb 4, 2020
Asynchronously processing sequential data blocks
ALTERYX INC1 citations59
US11334524B2May 17, 2022
Performing hash joins using parallel processing
ALTERYX INC0 citations54
US10489348B2Nov 26, 2019
Performing hash joins using parallel processing
ALTERYX INC1 citations54
US12346563B2Jul 1, 2025
Code point skipping with variable-width encoding for data analytics system
ALTERYX INC0 citations52
US10558364B2Feb 11, 2020
Memory allocation in a data analytics system
ALTERYX INC0 citations48
US12045654B2Jul 23, 2024
Memory management through control of data processing tasks
ALTERYX INC0 citations36
VLSI TECHNOLOGY INC
4 patentsUS5519627AMay 21, 1996
Datapath synthesis method and apparatus utilizing a structured cell library
VLSI TECHNOLOGY INC147 citations97
US5956257ASep 21, 1999
Automated optimization of hierarchical netlists
VLSI TECHNOLOGY INC77 citations96
US5299137AMar 29, 1994
Behavioral synthesis of circuits including high impedance buffers
VLSI TECHNOLOGY INC20 citations92
US5854926ADec 29, 1998
Method and apparatus for identifying flip-flops in HDL descriptions of circuits without specific templates
VLSI TECHNOLOGY INC10 citations72