P

Inventor

TUAN TIM

US49 patents
⚠️ This page may combine multiple inventors who share the name “TUAN TIM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

XILINX INC

38 patents
US7973556B1Jul 5, 2011

System and method for using reconfiguration ports for power management in integrated circuits

XILINX INC90 citations98
US7098689B1Aug 29, 2006

Disabling unused/inactive resources in programmable logic devices for static power reduction

XILINX INC79 citations98
US10866753B2Dec 15, 2020

Data processing engine arrangement in a device

XILINX INC15 citations94
US7764081B1Jul 27, 2010

Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity

XILINX INC51 citations94
US11336287B1May 17, 2022

Data processing engine array architecture with memory tiles

XILINX INC26 citations93
US7620926B1Nov 17, 2009

Methods and structures for flexible power management in integrated circuits

XILINX INC39 citations93
US7562332B1Jul 14, 2009

Disabling unused/inactive resources in programmable logic devices for static power reduction

XILINX INC13 citations93
US7504854B1Mar 17, 2009

Regulating unused/inactive resources in programmable logic devices for static power reduction

XILINX INC29 citations93
US7498836B1Mar 3, 2009

Programmable low power modes for embedded memory blocks

XILINX INC38 citations93
US6950998B1Sep 27, 2005

Place-and-route with power analysis

XILINX INC35 citations93
US7581124B1Aug 25, 2009

Method and mechanism for controlling power consumption of an integrated circuit

XILINX INC50 citations92
US7498835B1Mar 3, 2009

Implementation of low power standby modes for integrated circuits

XILINX INC47 citations92
US7477073B1Jan 13, 2009

Structures and methods for heterogeneous low power programmable logic device

XILINX INC35 citations92
US7992020B1Aug 2, 2011

Power management with packaged multi-die integrated circuit

XILINX INC26 citations88
US11288222B1Mar 29, 2022

Multi-die integrated circuit with data processing engine array

XILINX INC8 citations86
US11669464B1Jun 6, 2023

Multi-addressing mode for DMA and non-sequential read and write patterns

XILINX INC9 citations84
US11520717B1Dec 6, 2022

Memory tiles in data processing engine array

XILINX INC11 citations84
US7810058B1Oct 5, 2010

Early power estimator for integrated circuits

XILINX INC13 citations84
US7545177B1Jun 9, 2009

Method and apparatus for leakage current reduction

XILINX INC12 citations84
US7417454B1Aug 26, 2008

Low-swing interconnections for field programmable gate arrays

XILINX INC15 citations84
US7243312B1Jul 10, 2007

Method and apparatus for power optimization during an integrated circuit design process

XILINX INC12 citations84
US10635622B2Apr 28, 2020

System-on-chip interface architecture

XILINX INC10 citations83
US7549139B1Jun 16, 2009

Tuning programmable logic devices for low-power design implementation

XILINX INC18 citations83
US7490302B1Feb 10, 2009

Power gating various number of resources based on utilization levels

XILINX INC17 citations80
US7212462B1May 1, 2007

Structure and method for suppressing sub-threshold leakage in integrated circuits

XILINX INC8 citations74
US12001367B2Jun 4, 2024

Multi-die integrated circuit with data processing engine array

XILINX INC2 citations73
US11693808B2Jul 4, 2023

Multi-die integrated circuit with data processing engine array

XILINX INC3 citations73
US11323391B1May 3, 2022

Multi-port stream switch for stream interconnect network

XILINX INC6 citations73
US7253661B1Aug 7, 2007

Method and apparatus for a configurable latch

XILINX INC7 citations73
US10747531B1Aug 18, 2020

Core for a data processing engine in an integrated circuit

XILINX INC3 citations72
US11386020B1Jul 12, 2022

Programmable device having a data processing engine (DPE) array

XILINX INC2 citations69
US11848670B2Dec 19, 2023

Multiple partitions in a data processing array

XILINX INC2 citations68
US11972132B2Apr 30, 2024

Data processing engine arrangement in a device

XILINX INC0 citations62
US11443091B1Sep 13, 2022

Data processing engines with cascade connected cores

XILINX INC1 citations59
US12554310B2Feb 17, 2026

Power reduction in an array of data processing engines

XILINX INC0 citations58
US12401364B2Aug 26, 2025

Multiple partitions in a data processing array

XILINX INC0 citations58
US11223351B1Jan 11, 2022

Activity-aware clock gating for switches

XILINX INC0 citations56
US12164451B2Dec 10, 2024

Data processing array interface having interface tiles with multiple direct memory access circuits

XILINX INC0 citations44

TUAN TIM

8 patents

SUNDARARAJAN PRASANNA

1 patent

LESEA AUSTIN H

1 patent

MOHAN SUNDARARAJARAO

1 patent