P

Inventor

MORRIS BERNARD L

US39 patents
⚠️ This page may combine multiple inventors who share the name “MORRIS BERNARD L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AGERE SYSTEMS INC

22 patents
US7248079B2Jul 24, 2007

Differential buffer circuit with reduced output common mode variation

AGERE SYSTEMS INC20 citations92
US7145364B2Dec 5, 2006

Self-bypassing voltage level translator circuit

AGERE SYSTEMS INC21 citations92
US7106107B2Sep 12, 2006

Reliability comparator with hysteresis

AGERE SYSTEMS INC25 citations92
US7170324B2Jan 30, 2007

Output buffer with selectable slew rate

AGERE SYSTEMS INC31 citations90
US7495873B2Feb 24, 2009

Electrostatic discharge protection in a semiconductor device

AGERE SYSTEMS INC12 citations84
US7430100B2Sep 30, 2008

Buffer circuit with enhanced overvoltage protection

AGERE SYSTEMS INC12 citations84
US7382168B2Jun 3, 2008

Buffer circuit with multiple voltage range

AGERE SYSTEMS INC20 citations84
US7276957B2Oct 2, 2007

Floating well circuit having enhanced latch-up performance

AGERE SYSTEMS INC17 citations84
US7098694B2Aug 29, 2006

Overvoltage tolerant input buffer

AGERE SYSTEMS INC16 citations84
US7551020B2Jun 23, 2009

Enhanced output impedance compensation

AGERE SYSTEMS INC10 citations83
US7498860B2Mar 3, 2009

Buffer circuit having multiplexed voltage level translation

AGERE SYSTEMS INC13 citations83
US7397279B2Jul 8, 2008

Voltage level translator circuit with wide supply voltage range

AGERE SYSTEMS INC19 citations83
US7068074B2Jun 27, 2006

Voltage level translator circuit

AGERE SYSTEMS INC17 citations83
US7057545B1Jun 6, 2006

Semiconductor resistance compensation with enhanced efficiency

AGERE SYSTEMS INC10 citations74
US7511550B2Mar 31, 2009

Method and apparatus for improving reliability of an integrated circuit having multiple power domains

AGERE SYSTEMS INC4 citations63
US7432762B2Oct 7, 2008

Circuit having enhanced input signal range

AGERE SYSTEMS INC5 citations63
US7590961B2Sep 15, 2009

Integrated circuit with signal skew adjusting cell selected from cell library

AGERE SYSTEMS INC2 citations58
US7271614B2Sep 18, 2007

Buffer circuit with current limiting

AGERE SYSTEMS INC3 citations58
US7529071B2May 5, 2009

Circuit for selectively bypassing a capacitive element

AGERE SYSTEMS INC1 citations52
US7642807B2Jan 5, 2010

Multiple-mode compensated buffer circuit

AGERE SYSTEMS INC1 citations48
US6590433B2Jul 8, 2003

Reduced power consumption bi-directional buffer

AGERE SYSTEMS INC1 citations44
US7391825B2Jun 24, 2008

Comparator circuit having reduced pulse width distortion

AGERE SYSTEMS INC0 citations42

LUCENT TECHNOLOGIES INC

5 patents

AT & T BELL LAB

4 patents

AMERICAN TELEPHONE & TELEGRAPH

3 patents

AT & T CORP

2 patents

BHATTACHARYA DIPANKAR

2 patents

BELL TELEPHONE LABOR INC

1 patent