Inventor

ICHINOSE KATSUHIKO

JP17 patents

⚠️ This page may combine multiple inventors who share the name “ICHINOSE KATSUHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ICHINOSE KATSUHIKO

RENESAS TECH CORP

Semiconductor device including stress inducing films formed over n-channel and p-channel field effect transistors and a method of manufacturing the same

Semiconductor device with CMOS-field-effect transistors having improved drain current characteristics

CMOS transistors using gate electrodes to increase channel mobilities by inducing localized channel stress

Semiconductor integrated circuit device and process for manufacturing the same

Structure and method of applying localized stresses to the channels of PFET and NFET transistors for improved performance

Semiconductor integrated circuit device and a method of manufacturing the same

Semiconductor device including a nitride containing film to generate stress for improving current driving capacity of a field effect transistor

Semiconductor integrated circuit device and method of manufacturing the same

Method of manufacturing a semiconductor integrated circuit device

Semiconductor integrated circuit device and method of manufacturing the same

RENESAS ELECTRONICS CORP

P-channel transistor having an increased channel mobility due to a compressive stress-inducing gate electrode

Semiconductor device and a method of manufacturing the same

HITACHI LTD

Method of manufacturing a semiconductor device using oblique ion injection

SHIMIZU AKIHIRO

Semiconductor device including a film for applying stress to a channel formation region to increase current flow

HAYAKAWA KOICHI

Semiconductor defect classifying method, semiconductor defect classifying apparatus, and semiconductor defect classifying program

RENESAS TEHNOLOGY CORP

Semiconductor integrated circuit device

SAKAI TSUNEHIRO

Defect image processing apparatus, defect image processing method, semiconductor defect classifying apparatus, and semiconductor defect classifying method