Inventor

PENDHARKAR SAMEER

US171 patents

⚠️ This page may combine multiple inventors who share the name “PENDHARKAR SAMEER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PENDHARKAR SAMEER

TEXAS INSTRUMENTS INC

Drain-extended MOS transistors with diode clamp and methods for making the same

LDMOS power device with oversized dwell

Method of manufacturing high side and low side guard rings for lowest parasitic performance in an H-bridge configuration

Lateral double diffused metal oxide semiconductor device

Resurf LDMOS device with deep drain region

RESURF III-nitride HEMTs

Drain-extended MOS transistors and methods for making the same

Robust DEMOS transistors and method for making the same

Drain extended MOS devices with self-aligned floating region and fabrication methods therefor

Individualized low parasitic power distribution lines deposited over active integrated circuits

Transistor with source field plates and non-overlapping gate runner layers

Transistor with source field plates under gate runner layers

HEMT having conduction barrier between drain fingertip and source

Laterally diffused metal oxide semiconductor with segmented gate oxide

Dual deep trenches for high voltage isolation

Isolated III-N semiconductor devices

Drain extended CMOS with counter-doped drain extension

Integration of heat spreader for beol thermal management

Vertical trench MOSFET device in integrated power technologies

III-nitride device and method having a gate isolating structure

Stepped dielectric for field plate formation

Integrated lateral high voltage MOSFET

Lateral metal oxide semiconductor drain extension design

Laterally diffused MOSFET

Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof

Robust DEMOS transistors and method for making the same

Drain extended PMOS transistors and methods for making the same

Drain extended PMOS transistor with increased breakdown voltage

Drain-extended MOS transistors and methods for making the same

High voltage drain-extended transistor

Integrated power circuits with distributed bonding and current flow

Depletion drain-extended MOS transistors and methods for making the same

Method and apparatus to model and monitor time dependent dielectric breakdown in multi-field plate gallium nitride devices

Premature breakdown in submicron device geometries

Semiconductor structure with a doped region between two deep trench isolation structures

Semiconductor structure with a doped region between two deep trench isolation structures

CoSi2 Schottky diode integration in BiSMOS process

Formation of a MOSFET using an angled implant

Vertical diffused MOSFET

High voltage lateral junction diode device

Lateral MOSFET with buried drain extension layer

Laterally diffused metal oxide semiconductor with gate poly contact within source window

HEMT having conduction barrier between drain fingertip and source

Method for forming trench capacitor having two dielectric layers and two polysilicon layers

LDMOS transistor with segmented gate dielectric layer

Recessed solid state apparatuses

DENISON MARIE

MOS transistor with gate trench adjacent to drain extension field insulation

MOS transistor with gate trench adjacent to drain extension field insulation

PAULETTI TIMOTHY PATRICK

Bi-directional ESD protection circuit

STEINMANN PHILIPP

Drain extended CMOS with counter-doped drain extension