Inventor
OKABAYASHI HAZUKI
JP10 patents
⚠️ This page may combine multiple inventors who share the name “OKABAYASHI HAZUKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
PANASONIC CORP
6 patentsUS7594099B2Sep 22, 2009
Processor executing SIMD instructions
PANASONIC CORP20 citations92
US7502887B2Mar 10, 2009
N-way set associative cache memory and control method thereof
PANASONIC CORP33 citations92
US7970998B2Jun 28, 2011
Parallel caches operating in exclusive address ranges
PANASONIC CORP9 citations83
US7555610B2Jun 30, 2009
Cache memory and control method thereof
PANASONIC CORP3 citations62
US7953935B2May 31, 2011
Cache memory system, and control method therefor
PANASONIC CORP6 citations61
US9170841B2Oct 27, 2015
Multiprocessor system for comparing execution order of tasks to a failure pattern
PANASONIC CORP3 citations57
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD
4 patentsUS7281117B2Oct 9, 2007
Processor executing SIMD instructions
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD17 citations92
US7380112B2May 27, 2008
Processor and compiler for decoding an instruction and executing the decoded instruction with conditional execution flags
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD16 citations84
US7185176B2Feb 27, 2007
Processor executing SIMD instructions
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD5 citations63
US7454575B2Nov 18, 2008
Cache memory and its controlling method
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD4 citations62