P

Inventor

MARINO CHARLES F

US35 patents
⚠️ This page may combine multiple inventors who share the name “MARINO CHARLES F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

33 patents
US9342387B1May 17, 2016

Hardware-assisted interthread push communication

IBM13 citations84
US9286148B1Mar 15, 2016

Hardware-assisted interthread push communication

IBM13 citations84
US9176877B2Nov 3, 2015

Provision of early data from a lower level cache memory

IBM10 citations84
US9058273B1Jun 16, 2015

Frequency determination across an interface of a data processing system

IBM9 citations83
US6803922B2Oct 12, 2004

Pixel formatter for two-dimensional graphics engine of set-top box system

IBM10 citations74
US6784893B2Aug 31, 2004

Raster operation unit

IBM7 citations74
US6061403AMay 9, 2000

Computer program product for selectively reducing bandwidth of real-time video data

IBM7 citations74
US5986714ANov 16, 1999

Method, apparatus and computer program product for selectively reducing bandwidth of real-time video data

IBM13 citations74
US9208091B2Dec 8, 2015

Coherent attached processor proxy having hybrid directory

IBM4 citations73
US10223186B2Mar 5, 2019

Coherency error detection and reporting in a processor

IBM3 citations72
US9563594B2Feb 7, 2017

Intercomponent data communication between multiple time zones

IBM2 citations72
US11580058B1Feb 14, 2023

Hierarchical ring-based interconnection network for symmetric multiprocessors

IBM2 citations71
US9626229B1Apr 18, 2017

Processor performance monitoring unit synchronization

IBM4 citations69
US9367504B2Jun 14, 2016

Coherency overcommit

IBM2 citations63
US9367505B2Jun 14, 2016

Coherency overcommit

IBM2 citations63
US8370595B2Feb 5, 2013

Aggregate data processing system having multiple overlapping synthetic computers

IBM4 citations63
US10606777B2Mar 31, 2020

Dropped command truncation for efficient queue utilization in multiprocessor data processing system

IBM1 citations62
US9495314B2Nov 15, 2016

Determining command rate based on dropped commands

IBM2 citations62
US9495312B2Nov 15, 2016

Determining command rate based on dropped commands

IBM2 citations62
US9286220B2Mar 15, 2016

Provision of early data from a lower level cache memory

IBM2 citations62
US12099463B2Sep 24, 2024

Hierarchical ring-based interconnection network for symmetric multiprocessors

IBM0 citations61
US10275379B2Apr 30, 2019

Managing starvation in a distributed arbitration scheme

IBM1 citations58
US10664398B2May 26, 2020

Link-level cyclic redundancy check replay for non-blocking coherence flow

IBM0 citations52
US9575921B2Feb 21, 2017

Command rate configuration in data processing system

IBM0 citations52
US9251111B2Feb 2, 2016

Command rate configuration in data processing system

IBM1 citations52
US9208092B2Dec 8, 2015

Coherent attached processor proxy having hybrid directory

IBM1 citations52
US9582442B2Feb 28, 2017

Intercomponent data communication between different processors

IBM0 citations51
US9569394B2Feb 14, 2017

Intercomponent data communication

IBM0 citations51
US9515663B2Dec 6, 2016

Dynamic prescaling for performance counters

IBM0 citations51
US9419625B2Aug 16, 2016

Dynamic prescaling for performance counters

IBM1 citations51
US9384157B2Jul 5, 2016

Intercomponent data communication

IBM0 citations51
US9122608B2Sep 1, 2015

Frequency determination across an interface of a data processing system

IBM0 citations51
US10552354B2Feb 4, 2020

Managing starvation in a distributed arbitration scheme

IBM0 citations48

GUTHRIE GUY L

1 patent

ARIMILLI LAKSHMINARAYANA B

1 patent