P

Inventor

MA HAN-REI

US19 patents
⚠️ This page may combine multiple inventors who share the name “MA HAN-REI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

APLUS FLASH TECHNOLOGY INC

15 patents
US6862223B1Mar 1, 2005

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC130 citations99
US6850438B2Feb 1, 2005

Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

APLUS FLASH TECHNOLOGY INC75 citations98
US7110302B2Sep 19, 2006

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC25 citations96
US7102929B2Sep 5, 2006

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC51 citations96
US7075826B2Jul 11, 2006

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC28 citations96
US7372736B2May 13, 2008

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC13 citations93
US7289366B2Oct 30, 2007

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC19 citations93
US7283401B2Oct 16, 2007

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC17 citations93
US7154783B2Dec 26, 2006

Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

APLUS FLASH TECHNOLOGY INC21 citations93
US7149120B2Dec 12, 2006

Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

APLUS FLASH TECHNOLOGY INC13 citations93
US7064978B2Jun 20, 2006

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC33 citations93
US7324384B2Jan 29, 2008

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC18 citations92
US7120064B2Oct 10, 2006

Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout

APLUS FLASH TECHNOLOGY INC15 citations92
US7349257B2Mar 25, 2008

Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

APLUS FLASH TECHNOLOGY INC8 citations74
US7339824B2Mar 4, 2008

Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations

APLUS FLASH TECHNOLOGY INC4 citations74

LEE PETER W

2 patents

LEE PETER WUNG

1 patent

ABEDNEJA ASSETS AG L L C

1 patent