P

Inventor

FRONHEISER JODY A

US27 patents
⚠️ This page may combine multiple inventors who share the name “FRONHEISER JODY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GLOBALFOUNDRIES INC

24 patents
US9343300B1May 17, 2016

Methods of forming source/drain regions for a PMOS transistor device with a germanium-containing channel region

GLOBALFOUNDRIES INC45 citations94
US9362405B1Jun 7, 2016

Channel cladding last process flow for forming a channel region on a FinFET device

GLOBALFOUNDRIES INC20 citations92
US9716174B2Jul 25, 2017

Electrical isolation of FinFET active region by selective oxidation of sacrificial layer

GLOBALFOUNDRIES INC10 citations84
US9224865B2Dec 29, 2015

FinFET with insulator under channel

GLOBALFOUNDRIES INC13 citations84
US9117875B2Aug 25, 2015

Methods of forming isolated germanium-containing fins for a FinFET semiconductor device

GLOBALFOUNDRIES INC14 citations84
US8853019B1Oct 7, 2014

Methods of forming a semiconductor device with a nanowire channel structure by performing an anneal process

GLOBALFOUNDRIES INC7 citations83
US9530869B2Dec 27, 2016

Methods of forming embedded source/drain regions on finFET devices

GLOBALFOUNDRIES INC3 citations73
US9324618B1Apr 26, 2016

Methods of forming replacement fins for a FinFET device

GLOBALFOUNDRIES INC3 citations73
US9245980B2Jan 26, 2016

Methods of forming substantially defect-free, fully-strained silicon-germanium fins for a FinFET semiconductor device

GLOBALFOUNDRIES INC6 citations73
US9478663B2Oct 25, 2016

FinFET device including a uniform silicon alloy fin

GLOBALFOUNDRIES INC5 citations71
US9508848B1Nov 29, 2016

Methods of forming strained channel regions on FinFET devices by performing a heating process on a heat-expandable material

GLOBALFOUNDRIES INC2 citations63
US9502507B1Nov 22, 2016

Methods of forming strained channel regions on FinFET devices

GLOBALFOUNDRIES INC2 citations63
US9406803B2Aug 2, 2016

FinFET device including a uniform silicon alloy fin

GLOBALFOUNDRIES INC2 citations63
US10170616B2Jan 1, 2019

Methods of forming a vertical transistor device

GLOBALFOUNDRIES INC1 citations62
US10163677B2Dec 25, 2018

Electrically insulated fin structure(s) with alternative channel materials and fabrication methods

GLOBALFOUNDRIES INC0 citations52
US9881830B2Jan 30, 2018

Electrically insulated fin structure(s) with alternative channel materials and fabrication methods

GLOBALFOUNDRIES INC1 citations52
US9508853B2Nov 29, 2016

Channel cladding last process flow for forming a channel region on a FinFET device having a reduced size fin in the channel region

GLOBALFOUNDRIES INC1 citations52
US9337022B1May 10, 2016

Virtual relaxed substrate on edge-relaxed composite semiconductor pillars

GLOBALFOUNDRIES INC0 citations52
US9165767B2Oct 20, 2015

Semiconductor structure with increased space and volume between shaped epitaxial structures

GLOBALFOUNDRIES INC1 citations51
US10026659B2Jul 17, 2018

Methods of forming fin isolation regions under tensile-strained fins on FinFET semiconductor devices

GLOBALFOUNDRIES INC0 citations42
US9960257B2May 1, 2018

Common fabrication of multiple FinFETs with different channel heights

GLOBALFOUNDRIES INC0 citations42
US9536990B2Jan 3, 2017

Methods of forming replacement fins for a FinFET device using a targeted thickness for the patterned fin etch mask

GLOBALFOUNDRIES INC0 citations42
US9455140B2Sep 27, 2016

Methods of forming doped epitaxial SiGe material on semiconductor devices

GLOBALFOUNDRIES INC0 citations42
US10170617B2Jan 1, 2019

Vertical transport field effect transistors

GLOBALFOUNDRIES INC0 citations40

MASZARA WITOLD P

2 patents

GEN ELECTRIC

1 patent