Inventor
VILLAROSA JR LOUIS F
US2 patents
Patents
2 patentsUS6208650B1Mar 27, 2001
Circuit for performing high-speed, low latency frame relay switching with support for fragmentation and reassembly and channel multiplexing
PARADYNE CORP41 citations86
US6879650B1Apr 12, 2005
Circuit and method for detecting and correcting data clocking errors
PARADYNE CORP2 citations55