Inventor

PILEGGI LAWRENCE T

US17 patents

⚠️ This page may combine multiple inventors who share the name “PILEGGI LAWRENCE T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PILEGGI LAWRENCE T

UNIV CARNEGIE MELLON

Systems, methods and computer program products for creating hierarchical equivalent circuit models

Tunable integrated circuit design for nano-scale technologies

Methods, systems, and computer program products for modeling inductive effects in a circuit by combining a plurality of localized models

Method for parameterized model order reduction of integrated circuit interconnects

3DIC memory chips including computational logic-in-memory for performing accelerated data processing

PDF SOLUTIONS INC

Method and process for design of integrated circuits using regular geometry patterns to obtain geometrically consistent component features

Method for mapping a Boolean logic network to a limited set of application-domain specific logic cells

Method and process for design of integrated circuits using regular geometry patterns to obtain geometrically consistent component features

Method and system for grouping logic in an integrated circuit design to minimize number of transistors and number of unique geometry patterns

PILEGGI LAWRENCE T

Regular pattern arrays for memory and logic on a semiconductor substrate

Magnetic logic circuits and systems incorporating same

MOTIANI DIPTI

Method for the definition of a library of application-domain-specific logic cells

Method for the definition of a library of application-domain-specific logic cells

ZHU JIAN-GANG JIMMY

Magnetic switching cells and methods of making and operating same

MONTEREY DESIGN SYSTEMS INC

Method and apparatus for generating sign-off prototypes for the design and fabrication of integrated circuits

MORRIS DANIEL H

Chainlink memory

PDF Acquisition Corp

Method for the definition of a library of application-domain-specific logic cells