Inventor
ASHER DAVID
US23 patents
⚠️ This page may combine multiple inventors who share the name “ASHER DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CAVIUM LLC
7 patentsUS10282299B2May 7, 2019
Managing cache partitions based on cache usage information
CAVIUM LLC11 citations84
US10558573B1Feb 11, 2020
Methods and systems for distributing memory requests
CAVIUM LLC6 citations83
US10331500B2Jun 25, 2019
Managing fairness for lock and unlock operations using operation prioritization
CAVIUM LLC4 citations72
US10248420B2Apr 2, 2019
Managing lock and unlock operations using active spinning
CAVIUM LLC2 citations72
US11119929B2Sep 14, 2021
Low latency inter-chip communication mechanism in multi-chip processing system
CAVIUM LLC2 citations71
US10599430B2Mar 24, 2020
Managing lock and unlock operations using operation prediction
CAVIUM LLC0 citations51
US10445096B2Oct 15, 2019
Managing lock and unlock operations using traffic prioritization
CAVIUM LLC0 citations51
CAVIUM INC
7 patentsUS10002218B2Jun 19, 2018
Verification of a multichip coherence protocol
CAVIUM INC2 citations72
US9870328B2Jan 16, 2018
Managing buffered communication between cores
CAVIUM INC6 citations71
US9665505B2May 30, 2017
Managing buffered communication between sockets
CAVIUM INC3 citations71
US9501425B2Nov 22, 2016
Translation lookaside buffer management
CAVIUM INC6 citations71
US9355206B2May 31, 2016
System and method for automated functional coverage generation and management for IC design protocols
CAVIUM INC6 citations70
US10007614B2Jun 26, 2018
Method and apparatus for determining metric for selective caching
CAVIUM INC2 citations69
US9058463B1Jun 16, 2015
Systems and methods for specifying. modeling, implementing and verifying IC design protocols
CAVIUM INC3 citations60
MARVELL ASIA PTE LTD
6 patentsUS11615027B2Mar 28, 2023
Methods and systems for distributing memory requests
MARVELL ASIA PTE LTD1 citations72
US11188466B2Nov 30, 2021
Methods and systems for distributing memory requests
MARVELL ASIA PTE LTD1 citations72
US11868262B2Jan 9, 2024
Methods and systems for distributing memory requests
MARVELL ASIA PTE LTD0 citations62
US12019552B2Jun 25, 2024
Low latency inter-chip communication mechanism in a multi-chip processing system
MARVELL ASIA PTE LTD0 citations60
US11620223B2Apr 4, 2023
Low latency inter-chip communication mechanism in a multi-chip processing system
MARVELL ASIA PTE LTD0 citations60
US11379379B1Jul 5, 2022
Differential cache block sizing for computing systems
MARVELL ASIA PTE LTD0 citations49