Inventor

KWOK TSZ-MEI

TW92 patents

⚠️ This page may combine multiple inventors who share the name “KWOK TSZ-MEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KWOK TSZ-MEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device, static random access memory cell and manufacturing method of semiconductor device

MOS devices having epitaxy regions with reduced facets

Integrated circuit and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Structure and method for semiconductor device

Germanium profile for channel strain

MOS devices with non-uniform P-type impurity profile

V-shaped epitaxially formed semiconductor layer

Source and drain stressors with recessed top surfaces

Controlling the shape of source/drain regions in FinFETs

Transistor strain-inducing scheme

Confined source/drain epitaxy regions and method forming same

Confined source/drain epitaxy regions and method forming same

Semiconductor device having epitaxy source/drain regions

Semiconductor device and manufacturing method thereof

Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same

Semiconductor device and method of forming same

Semiconductor device and manufacturing method thereof

Source and drain stressors with recessed top surfaces

Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same

Source and drain stressors with recessed top surfaces

MOS devices having epitaxy regions with reduced facets

Integrated circuit having field-effect trasistors with dielectric fin sidewall structures and manufacturing method thereof

Method for making source and drain regions of a MOSFET with embedded germanium-containing layers having different germanium concentration

MOS devices having epitaxy regions with reduced facets

Semiconductor device having epitaxy source/drain regions

Method of forming devices with strained source/drain structures

Semiconductor device

Semiconductor device and manufacturing method thereof

Doping profile for strained source/drain region

Semiconductor device and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG

Method for fabricating a FinFET device

Controlling the shape of source/drain regions in FinFETs

Method for forming epitaxial feature

Controlling the shape of source/drain regions in FinFETs

MOS device having source and drain regions with embedded germanium-containing diffusion barrier

MOS devices having epitaxy regions with reduced facets

Defect reduction for formation of epitaxial layer in source and drain regions

Reducing pattern loading effect in epitaxy

SU CHIEN-CHANG

Epitaxy profile engineering for FinFETs

Epitaxy profile engineering for FinFETs

Method for incorporating impurity element in EPI silicon process

KWOK TSZ-MEI

Semiconductor devices with strained source/drain structures

Method of manufacturing strained source/drain structures

LAI LI-SHYUE

Finfets and methods for forming the same

LIN HSIEN-HSIN

Method of fabricating a FinFET device

HUANG YU-LIEN

High surface dopant concentration semiconductor device and method of fabricating

CHEN KUAN-YU

Method for improving selectivity of epi process

TSAI CHUN HSIUNG

Mechanisms for forming stressor regions in a semiconductor device

CHENG CHUN-FAI

Semiconductor device and method of manufacturing the same