Inventor

CRAFTS HAROLD S

US49 patents

⚠️ This page may combine multiple inventors who share the name “CRAFTS HAROLD S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CRAFTS HAROLD S

NCR CO

Connection system for integrated circuits which reduces cross-talk

Gate isolated base cell structure with off-grid gate polysilicon pattern

Voltage variable delay circuit

Trinary to binary level conversion circuit

Semiconductor fuse structure

Gate isolated I.O cell architecture for diverse pad and drive configurations

Common cell I/O interface circuit

Threshold controlled input circuit for an integrated circuit

Electrical connection between buses on a semiconductor integrated circuit

High density input/output cell arrangement for integrated circuits

Current limiting output driver

High frequency integrated circuit channel capacitor

Circuit for initiating test modes

Negative input voltage CMOS circuit

High speed cmos flip-flop employing clocked tristate inverters

LSI LOGIC CORP

Method and apparatus for self correcting parallel I/O circuitry

DRAM with built-in noise protection

Hierarchical, adaptable-configuration dynamic random access memory

Inherently compensated clocking circuit for dynamic random access memory

Embedded DRAM with noise-protecting substrate isolation well

Embedded DRAM with noise protecting shielding conductor

Electrically selectable redundant components for an embedded DRAM

Reprogrammable address selector for an embedded DRAM

Reprogrammable addressing process for embedded DRAM

Method and apparatus for data dependent, dual level output driver

Method and apparatus for data dependent, dual level output driver

Antifuse device for use on a field programmable interconnect chip

Embedded dram with noise-protected differential capacitor memory cells

AT & T GLOBAL INF SOLUTION

Polysilicon fuse array structure for integrated circuits

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Multi-chip module packaging system

High speed, low power input/output circuit for a multi-chip module

Method and apparatus for calculating dynamic power dissipation in CMOS integrated circuits

Differential analog transistors constructed from digital transistors

Analog output driver for gate arrays

Current limited output driver for a gate array circuit

Repeatedly programmable logic array using dynamic access memory

Semiconductor fuse structure

Differential analog transistors constructed from digital transistors

HYUNDAI ELECTRONICS AMERICA

Method of constructing an integrated circuit comprising an embedded macro

Method of constructing an integrated circuit utilizing multiple layers of interconnect

Method of forming sea-of-cells array of transistors

Sea-of-cells array of transistors

MAGNACHIP SEMICONDUCTOR LTD

Sea-of-cells array of transistors

Sea-of-cells array of transistors

Sea-of-cells array of transistors

SYMBIOS INC

Antifuse device for use on a field programmable interconnect chip

HYNIX SEMICONDUCTOR INC

Sea-of-cells array of transistors