Inventor

RADULESCU FABIAN

US40 patents

⚠️ This page may combine multiple inventors who share the name “RADULESCU FABIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RADULESCU FABIAN

CREE INC

Recessed field plate transistor structures

High electron mobility transistors and power amplifiers including said transistors having improved performance and reliability

Cascode structures for GaN HEMTs

Methods of forming semiconductor contacts

Semiconductor having a backside wafer cavity for radio frequency (RF) passive device integration and/or improved cooling and process of implementing the same

Stepped field plates with proximity to conduction channel and related fabrication methods

Semiconductor device with self-aligned ohmic contacts

High electron mobility transistors having improved drain current drift and/or leakage current performance

High electron mobility transistors having improved drain current drift and/or leakage current performance

High electron mobility transistors having improved contact spacing and/or improved contact vias

Ni-rich Schottky contact

Semiconductor die with improved ruggedness

Semiconductor die with improved ruggedness

Semiconductor device with improved field plate

Wafer-level die attach metallization

Wafer-level die attach metallization

Gate contact for a semiconductor device and methods of fabrication thereof

Packaged electronic circuits having moisture protection encapsulation and methods of forming same

Multilayer encapsulation for humidity robustness and related fabrication methods

Tunnel junction field effect transistors having self-aligned source and gate electrodes and methods of forming the same

Tunnel junction field effect transistors having self-aligned source and gate electrodes and methods of forming the same

Dielectric solder barrier for semiconductor devices

Gate contact for a semiconductor device and methods of fabrication thereof

Method of manufacturing precise semiconductor contacts

Using stress reduction barrier sub-layers in a semiconductor die

WOLFSPEED INC

Semiconductor device with isolation and/or protection structures

Field effect transistor with enhanced reliability

Field effect transistors with modified access regions

Packaged electronic circuits having moisture protection encapsulation and methods of forming same

Die-to-die isolation structures for packaged transistor devices

Integrated doherty amplifier with added isolation between the carrier and the peaking transistors

Field effect transistor with at least partially recessed field plate

Methods for pillar connection on frontside and passive device integration on backside of die

Methods for pillar connection on frontside and passive device integration on backside of die

Semiconductor die with improved ruggedness

High electron mobility transistors and power amplifiers including said transistors having improved performance and reliability

Field effect transistor with selective modified access regions

MACOM TECH SOLUTIONS HOLDINGS INC

Plasma-based barrier layer removal method for increasing peak transconductance while maintaining on-state resistance and related devices

High electron mobility transistors having reduced drain current drift and methods of fabricating such devices

TRIQUINT SEMICONDUCTOR INC

Thin film resistor and method of making the same