Inventor
PARIKH DHARMESH
US10 patents
⚠️ This page may combine multiple inventors who share the name “PARIKH DHARMESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
5 patentsUS9703711B2Jul 11, 2017
Managing cache coherence for memory caches
IBM2 citations68
US11042312B2Jun 22, 2021
DRAM bank activation management
IBM1 citations61
US10572168B2Feb 25, 2020
DRAM bank activation management
IBM1 citations61
US10380040B2Aug 13, 2019
Memory request scheduling to improve bank group utilization
IBM0 citations50
US9703710B2Jul 11, 2017
Managing cache coherence for memory caches
IBM0 citations47
CISCO TECH INC
2 patentsQUALCOMM INC
2 patentsUS12298903B2May 13, 2025
Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh
QUALCOMM INC0 citations55
US11749332B2Sep 5, 2023
Effective DRAM interleaving for asymmetric size channels or ranks while supporting improved partial array self-refresh
QUALCOMM INC0 citations55