Inventor

WOJNAROWSKI ROBERT J

US93 patents

⚠️ This page may combine multiple inventors who share the name “WOJNAROWSKI ROBERT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WOJNAROWSKI ROBERT J

GEN ELECTRIC

High power LED lamp structure using phase change cooling enhancements for LED lighting products

Vacuum fixture and method for fabricating electronic assemblies

Method for fabricating an integrated circuit module

Integral power and ground structure for multi-chip modules

Method for thinning of integrated circuit chips for lightweight packaged electronic systems

Compact high density interconnect structure

Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive

Method for packaging integrated circuit chips employing a polymer film overlay layer

Multichip integrated circuit packaging method

Laser beam scanning method for forming via holes in polymer materials

Adaptive lithography system to provide high density interconnect

Multichip integrated circuit packaging configuration and method

Excimer laser patterning of a novel resist

Capacitive touch entry apparatus having high degree of personal safety

Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers

Method for interconnecting a stack of integrated circuits at a very high density

Flip chip led apparatus

Led lead frame assembly

LED cross-linkable phosphor coating

LED cross-linkable phospor coating

Phosphor coating with self-adjusting distance from LED chip

Low Dielectric constant materials for high speed electronics

Processing low dielectric constant materials for high speed electronics

Hermetic high density interconnected electronic system

HDI impedance matched microwave circuit assembly

High density interconnect structure including a chamber

High density interconnect structure with top mounted components

Laser ablatable polymer dielectrics and methods

Mutliple lamination high density interconnect process and structure employing thermoplastic adhesives having sequentially decreasing TG &#39;s

Epoxy/polyimide copolymer blend dielectric and layered circuits incorporating it

Direct patterning of metals over a thermally inefficient surface using a laser

High density interconnect with high volumetric efficiency

Die attachment method using nonconductive adhesive for use in high density interconnected assemblies

Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer

Multi-chip interconnection package

Method and configuration for testing electronic circuits and integrated circuit chips using a removable overlay layer

Simplified method for repair of high density interconnect circuits

Integrated circuit packaging configuration for rapid customized design and unique test capability

Excimer laser patterning of a novel resist using masked and maskless process steps

Method to produce via holes in polymer dielectrics for multiple electronic circuit chip packaging

Television frame synchronizer with independently controllable input/output rates

Electrical conductor

MARTIN MARIETTA CORP

Flexible high density interconnect structure and flexibly interconnected system

Fabrication and structures of circuit modules with flexible interconnect layers

Reworkable high density interconnect structure incorporating a release layer

Wafer level integration and testing

Optical light pipe and microwave waveguide interconnects in multichip modules formed using adaptive lithography

Optical light pipe and microwave waveguide interconnects in multichip modules formed using adaptive lithography

Integrated circuit chip placement in a high density interconnect structure

Method for enhancement of semiconductor device contact pads

Mutliple lamination high density interconnect process and structure employing thermoplastic adhesives having sequentially decreasing TG 's