P

Inventor

HUSSEIN MAKAREM A

US28 patents
⚠️ This page may combine multiple inventors who share the name “HUSSEIN MAKAREM A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

20 patents
US6365529B1Apr 2, 2002

Method for patterning dual damascene interconnects using a sacrificial light absorbing material

INTEL CORP121 citations98
US6169024B1Jan 2, 2001

Process to manufacture continuous metal interconnects

INTEL CORP90 citations98
US6329118B1Dec 11, 2001

Method for patterning dual damascene interconnects using a sacrificial light absorbing material

INTEL CORP107 citations97
US5714413AFeb 3, 1998

Method of making a transistor having a deposited dual-layer spacer structure

INTEL CORP117 citations97
US6981380B2Jan 3, 2006

Thermoelectric cooling for microelectronic packages and dice

INTEL CORP51 citations96
US6037255AMar 14, 2000

Method for making integrated circuit having polymer interlayer dielectric

INTEL CORP55 citations95
US7649239B2Jan 19, 2010

Dielectric spacers for metal interconnects and method to form the same

INTEL CORP22 citations92
US6406995B1Jun 18, 2002

Pattern-sensitive deposition for damascene processing

INTEL CORP72 citations92
US6908829B2Jun 21, 2005

Method of forming an air gap intermetal layer dielectric (ILD) by utilizing a dielectric material to bridge underlying metal lines

INTEL CORP34 citations91
US6649515B2Nov 18, 2003

Photoimageable material patterning techniques useful in fabricating conductive lines in circuit structures

INTEL CORP35 citations89
US7071554B2Jul 4, 2006

Stress mitigation layer to reduce under bump stress concentration

INTEL CORP16 citations84
US6774037B2Aug 10, 2004

Method integrating polymeric interlayer dielectric in integrated circuits

INTEL CORP18 citations80
US7923760B2Apr 12, 2011

Dielectric spacers for metal interconnects and method to form the same

INTEL CORP5 citations74
US7157380B2Jan 2, 2007

Damascene process for fabricating interconnect layers in an integrated circuit

INTEL CORP9 citations74
US6720631B2Apr 13, 2004

Transistor having a deposited dual-layer spacer structure

INTEL CORP7 citations72
US7166922B1Jan 23, 2007

Continuous metal interconnects

INTEL CORP2 citations63
US7078754B2Jul 18, 2006

Methods and apparatuses for producing a polymer memory device

INTEL CORP4 citations62
US6900063B2May 31, 2005

Methods and apparatuses for producing a polymer memory device

INTEL CORP2 citations62
US7659196B2Feb 9, 2010

Soluble hard mask for interlayer dielectric patterning

INTEL CORP3 citations56
US7326981B2Feb 5, 2008

Methods and apparatuses for producing a polymer memory device

INTEL CORP0 citations51

LUXNOUR TECH INC

4 patents

LI BO

1 patent

TOKYO OHKA KOGYO CO LTD

1 patent

HUSSEIN MAKAREM A

1 patent

HONEYWELL INT INC

1 patent