Inventor
BARRAUD SYLVAIN
FR22 patents
⚠️ This page may combine multiple inventors who share the name “BARRAUD SYLVAIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
COMMISSARIAT ENERGIE ATOMIQUE
20 patentsUS8969148B2Mar 3, 2015
Method for producing a transistor structure with superimposed nanowires and with a surrounding gate
COMMISSARIAT ENERGIE ATOMIQUE17 citations84
US10217849B2Feb 26, 2019
Method for making a semiconductor device with nanowire and aligned external and internal spacers
COMMISSARIAT ENERGIE ATOMIQUE7 citations83
US9876121B2Jan 23, 2018
Method for making a transistor in a stack of superimposed semiconductor layers
COMMISSARIAT ENERGIE ATOMIQUE4 citations73
US11152360B2Oct 19, 2021
Architecture of N and P transistors superposed with canal structure formed of nanowires
COMMISSARIAT ENERGIE ATOMIQUE3 citations72
US10522669B2Dec 31, 2019
Quantum box device comprising dopants located in a thin semiconductor layer
COMMISSARIAT ENERGIE ATOMIQUE4 citations72
US9853124B2Dec 26, 2017
Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacers
COMMISSARIAT ENERGIE ATOMIQUE4 citations72
US10903349B2Jan 26, 2021
Electronic component with multiple quantum islands
COMMISSARIAT ENERGIE ATOMIQUE2 citations71
US12237330B2Feb 25, 2025
Architecture with stacked N and P transistors with a channel structure formed of nanowires
COMMISSARIAT ENERGIE ATOMIQUE0 citations62
US11088259B2Aug 10, 2021
Method of manufacturing an electronic component including multiple quantum dots
COMMISSARIAT ENERGIE ATOMIQUE1 citations60
US11532670B2Dec 20, 2022
3D memory and manufacturing process
COMMISSARIAT ENERGIE ATOMIQUE0 citations59
US12389644B2Aug 12, 2025
Method for manufacturing a transistor with a gate-all-around structure
COMMISSARIAT ENERGIE ATOMIQUE0 citations56
US9425255B2Aug 23, 2016
Nanowire and planar transistors co-integrated on utbox SOI substrate
COMMISSARIAT ENERGIE ATOMIQUE0 citations51
US9276073B2Mar 1, 2016
Nanowire and planar transistors co-integrated on utbox SOI substrate
COMMISSARIAT ENERGIE ATOMIQUE1 citations51
US12588220B2Mar 24, 2026
1TIR memory with a 3D structure
COMMISSARIAT ENERGIE ATOMIQUE0 citations49
US11889704B2Jan 30, 2024
Device comprising wrap-gate transistors and method of manufacturing such a device
COMMISSARIAT ENERGIE ATOMIQUE0 citations49
US12527082B2Jan 13, 2026
Microelectronic device with two field-effect transistors having a common electrode
COMMISSARIAT ENERGIE ATOMIQUE0 citations47
US12342617B2Jun 24, 2025
Microelectronic device with two field-effect transistors
COMMISSARIAT ENERGIE ATOMIQUE0 citations47
US11239374B2Feb 1, 2022
Method of fabricating a field effect transistor
COMMISSARIAT ENERGIE ATOMIQUE0 citations47
US9911841B2Mar 6, 2018
Single-electron transistor and its fabrication method
COMMISSARIAT ENERGIE ATOMIQUE0 citations45
US12272398B2Apr 8, 2025
Three-dimensional structure of memories for in-memory computing
COMMISSARIAT ENERGIE ATOMIQUE0 citations37