Inventor

SHACHAM OFER

US42 patents

⚠️ This page may combine multiple inventors who share the name “SHACHAM OFER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHACHAM OFER

GOOGLE LLC

Statistics operations on two dimensional image processor

Convolutional neural network on programmable two dimensional image processor

Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register

Line buffer unit for image processor

Sheet generator for image processor

Virtual linebuffers for image signal processors

Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register

Convolutional neural network on programmable two dimensional image processor

Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register

Virtual linebuffers for image signal processors

Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform

Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform

Energy efficient processor core architecture for image processor

Core processes for block operations on an image processor having a two-dimensional execution lane array and a two-dimensional shift register

Architecture for high performance, power efficient, programmable image processing

Multi-functional execution lane for image processor

Configurable and programmable image processor unit

Convolutional neural network on programmable two dimensional image processor

Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register

Line buffer unit for image processor

Two dimensional shift array for image processor

Energy efficient processor core architecture for image processor

Sheet generator for image processor

Configurable and programmable image processor unit

Virtual linebuffers for image signal processors

Energy efficient processor core architecture for image processor

Line buffer unit for image processor

Sheet generator for image processor

Two dimensional shift array for image processor

Sheet generator for image processor

Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure

Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure

Architecture for high performance, power efficient, programmable image processing

Architecture for high performance, power efficient, programmable image processing

Image processor with high throughput internal communication protocol

Image processor with configurable number of active cores and supporting internal network

GOOGLE INC

Energy efficient processor core architecture for image processor

Two dimensional shift array for image processor

Line buffer unit for image processor

Virtual linebuffers for image signal processors

Multi-functional execution lane for image processor

SHACHAM OFER

System and method for a chip generator