Inventor
CHOU CHIACHEN
US3 patents
Patents
3 patentsUS10387319B2Aug 20, 2019
Processors, methods, and systems for a configurable spatial accelerator with memory system performance, power reduction, and atomics support features
INTEL CORP9 citations82
US11030108B2Jun 8, 2021
System, apparatus and method for selective enabling of locality-based instruction handling
INTEL CORP0 citations60
US10409727B2Sep 10, 2019
System, apparatus and method for selective enabling of locality-based instruction handling
INTEL CORP1 citations60