Inventor

LEE YA-LIEN

TW48 patents

⚠️ This page may combine multiple inventors who share the name “LEE YA-LIEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE YA-LIEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of forming an interconnect structure

Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same

Method of forming hybrid diffusion barrier layer and semiconductor device thereof

Mitigating pattern collapse

Method of forming an interconnect structure having a carbon-containing barrier layer

Global dielectric and barrier layer

Method of using a barrier-seed tool for forming fine pitched metal interconnects

Mitigating pattern collapse

Two step metallization formation

Diffusion barrier for semiconductor device and method

Diffusion barrier layer for conductive via to decrease contact resistance

Selective deposition of metal barrier in damascene processes

Interconnect structure having a carbon-containing barrier layer

Semiconductor device, method and machine of manufacture

Interconnect structure of semiconductor device

Interconnect structure having a carbon-containing barrier layer

Semiconductor device, method and machine of manufacture

Barrier layer formation for conductive feature

Device and method for reducing contact resistance of a metal

Global dielectric and barrier layer

Interconnect structure having a carbon-containing barrier layer

Gradient atomic layer deposition

Barrier layer formation for conductive feature

Mitigating pattern collapse

Device and method for reducing contact resistance of a metal

Diffusion barrier layer for conductive via to decrease contact resistance

Semiconductor devices and methods of formation

Diffusion barrier layer for conductive via to decrease contact resistance

Via for semiconductor device and method

Selective deposition of metal barrier in damascene processes

Selective deposition of metal barrier in damascene processes and the structures formed thereof

Via for semiconductor device and method

Selective metal cap in an interconnect structure

Interconnect structure having a carbon-containing barrier layer

Two step metallization formation

Method of forming hybrid diffusion barrier layer and semiconductor device thereof

Global dielectric and barrier layer

Method of using a barrier-seed tool for forming fine-pitched metal interconnects

Barrier layer formation for conductive feature

Gradient atomic layer deposition

Device and method for reducing contact resistance of a metal

Method of forming self-alignment contact

Semiconductor device structure and method for forming the same

Semiconductor device structure and method for forming the same

TAIWAN SEMICONDUCTOR MFG

Global dielectric and barrier layer

Method of semiconductor integrated circuit fabrication

Device and method for reducing contact resistance of a metal

LEE YA-LIEN

Device for reducing contact resistance of a metal