Inventor

CHEN BOMY

US71 patents

⚠️ This page may combine multiple inventors who share the name “CHEN BOMY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN BOMY

SILICON STORAGE TECH INC

Memory device and method of operating same

Memory device with discrete layers of phase change memory material

Phase change memory device employing thermally insulating voids

Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation

Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same

Phase change memory device employing thermal-electrical contacts with narrowing electrical current paths

Differential non-volatile content addressable memory cell and array using phase changing resistor storage elements

Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region, and a memory array made thereby

Non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation

Semiconductor memory array of floating gate memory cells with buried floating gate

Method of making sub-lithographic sized contact holes

Word line voltage boosting circuit and a memory array incorporating same

Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation

Method of manufacturing an array of bi-directional nonvolatile memory cells

Semiconductor memory array of floating gate memory cells with burried floating gate and pointed channel region

Array of contactless non-volatile memory cells

Stacked gate memory cell with erase to gate, array, and method of manufacturing

Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation

Integrated circuit with a reprogrammable nonvolatile switch for selectively connecting a source for a signal to a circuit

Nonvolatile memory cell having floating gate, control gate and separate erase gate, an array of such memory cells, and method of manufacturing

Semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region

Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same

NROM device

Integrated circuit with a reprogrammable nonvolatile switch having a dynamic threshold voltage (VTH) for selectively connecting a source for a signal to a circuit

Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same

Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation

Integrated circuit with a three transistor reprogrammable nonvolatile switch for selectively connecting a source for a signal to a circuit

Method of trimming semiconductor elements with electrical resistance feedback

Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate and pointed channel region

Method of making phase change memory device employing thermally insulating voids and sloped trench

Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same

Bidirectional nonvolatile memory cell having charge trapping layer in trench and an array of such memory cells, and method of manufacturing

Bi-directional read/program non-volatile floating gate memory array, and method of formation

Method of manufacturing an isolation-less, contact-less array of bi-directional read/program non-volatile floating gate memory cells with independent controllable control gates

Non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation

Multi-bit ROM cell with bi-directional read and a method for making thereof

MICROCHIP TECH INC

Sidewall type memory cell

Flash memory cell adapted for low voltage and/or non-volatile performance

Sidewall-type memory cell

EEPROM memory cell with low voltage read path and high voltage erase/write path

Integrated circuit package with heat transfer chimney including thermally conductive nanoparticles

Integrated circuit (IC) package with integrated inductor having core magnetic field (B field) extending parallel to substrate

Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond

Mixed-orientation multi-die integrated circuit package with at least one vertically-mounted die

Integrated circuit (IC) device including a force mitigation system for reducing under-pad damage caused by wire bond

High voltage double-diffused MOS (DMOS) device and method of manufacture

INFINEON TECHNOLOGIES AG

Source/drain-on insulator (S/DOI) field effect transistor using oxidized amorphous silicon and method of fabrication

SILICON STORAGE TECHNOLGY INC

NOR flash memory

CHEN BOMY

Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same

IBM

Integrated plating and planarization process and apparatus therefor