Inventor · disambiguated record
Jeffrey Todd Bridges
Also filed as: BRIDGES JEFFREY T · BRIDGES JEFFREY TODD
57 granted patents·9 pending applications·914 citations·filing 1992–2018
99Inventor score
Top patents by PatentIndex Score
66 records- 0194US9413344B2Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systemsQUALCOMM INC·Filed 2015·Granted Aug 9, 2016·21 cites·29 claims
- 0290US10635159B2Adaptive voltage modulation circuits for adjusting supply voltage to reduce supply voltage droops and minimize power consumptionQUALCOMM INC·Filed 2017·Granted Apr 28, 2020·8 cites·30 claims
- 0390US7624256B2System and method wherein conditional instructions unconditionally provide outputQUALCOMM INC·Filed 2005·Granted Nov 24, 2009·24 cites·15 claims
- 0490US5291076ADecoder/comparator and method of operationMOTOROLA INC·Filed 1992·Granted Mar 1, 1994·62 cites·15 claims
- 0589US7152155B2System and method of correcting a branch mispredictionQUALCOMM INC·Filed 2005·Granted Dec 19, 2006·19 cites·17 claims
- 0688US5996092ASystem and method for tracing program execution within a processor before and after a triggering eventIBM·Filed 1996·Granted Nov 30, 1999·127 cites·4 claims
- 0787US7278012B2Method and apparatus for efficiently accessing first and second branch history tables to predict branch instructionsQUALCOMM INC·Filed 2005·Granted Oct 2, 2007·18 cites·22 claims
- 0886US8797095B2Adaptive voltage scalers (AVS), systems, and related methodsMOORE RICHARD A·Filed 2010·Granted Aug 5, 2014·8 cites·41 claims
- 0986US8008961B2Adaptive clock generators, systems, and methodsQUALCOMM INC·Filed 2009·Granted Aug 30, 2011·13 cites·23 claims
- 1086US7587580B2Power efficient instruction prefetch mechanismQUALCOMM INC·Filed 2005·Granted Sep 8, 2009·14 cites·11 claims
- 1185US7366869B2Method and system for optimizing translation lookaside buffer entriesQUALCOMM INC·Filed 2005·Granted Apr 29, 2008·15 cites·14 claims
- 1284US9122291B2Adaptive voltage scalers (AVSs), systems, and related methodsQUALCOMM INC·Filed 2014·Granted Sep 1, 2015·5 cites·17 claims
- 1383US8725488B2Method and apparatus for adaptive voltage scaling based on instruction usageHOFMANN RICHARD GERARD·Filed 2007·Granted May 13, 2014·12 cites·23 claims
- 1483US6826747B1System and method for tracing program instructions before and after a trace triggering event within a processorIBM·Filed 1999·Granted Nov 30, 2004·88 cites·19 claims
- 1582US9483098B2Circuits, systems and methods to detect and accommodate power supply voltage droopBRIDGES JEFFREY TODD·Filed 2010·Granted Nov 1, 2016·11 cites·29 claims
- 1681US10831254B2Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirementsQUALCOMM INC·Filed 2018·Granted Nov 10, 2020·4 cites·26 claims
- 1780US6081860AAddress pipelining for data transfersIBM·Filed 1997·Granted Jun 27, 2000·92 cites·15 claims
- 1879US7805588B2Caching memory attribute indicators with cached memory data fieldQUALCOMM INC·Filed 2005·Granted Sep 28, 2010·9 cites·26 claims
- 1979US7426626B2TLB lock indicatorQUALCOMM INC·Filed 2005·Granted Sep 16, 2008·9 cites·18 claims
- 2079US7421568B2Power saving methods and apparatus to selectively enable cache bits based on known processor stateQUALCOMM INC·Filed 2005·Granted Sep 2, 2008·9 cites·18 claims
- 2176US6055584AProcessor local bus posted DMA FlyBy burst transfersIBM·Filed 1997·Granted Apr 25, 2000·82 cites·35 claims
- 2275US7437537B2Methods and apparatus for predicting unaligned memory accessQUALCOMM INC·Filed 2005·Granted Oct 14, 2008·7 cites·18 claims
- 2374US7415638B2Pre-decode error handling via branch correctionQUALCOMM INC·Filed 2004·Granted Aug 19, 2008·17 cites·22 claims
- 2474US7281118B2Sending thread message generated using DCR command pointed message control block storing message and response memory address in multiprocessorIBM·Filed 2005·Granted Oct 9, 2007·6 cites·17 claims
- 2572US7210024B2Conditional instruction execution via emissary instruction for condition evaluationQUALCOMM INC·Filed 2005·Granted Apr 24, 2007·5 cites·19 claims
- 2671US8452993B2Circuits, systems, and methods for dynamically controlling a power supply configuration in response to load requirements from a digital circuitBRIDGES JEFFREY T·Filed 2010·Granted May 28, 2013·4 cites·31 claims
- 2771US7404042B2Handling cache miss in an instruction crossing a cache line boundaryQUALCOMM INC·Filed 2005·Granted Jul 22, 2008·5 cites·18 claims
- 2871US5809293ASystem and method for program execution tracing within an integrated processorIBM·Filed 1994·Granted Sep 15, 1998·58 cites·29 claims
- 2970US7203826B2Method and apparatus for managing a return stackQUALCOMM INC·Filed 2005·Granted Apr 10, 2007·4 cites·25 claims
- 3069US7698536B2Method and system for providing an energy efficient register fileQUALCOMM INC·Filed 2005·Granted Apr 13, 2010·4 cites·21 claims
- 3169US7366877B2Speculative instruction issue in a simultaneously multithreaded processorIBM·Filed 2003·Granted Apr 29, 2008·12 cites·14 claims
- 3268US9851774B2Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phaseQUALCOMM INC·Filed 2016·Granted Dec 26, 2017·1 cites·29 claims
- 3368US7821350B2Methods and apparatus for dynamic frequency scaling of phase locked loops for microprocessorsQUALCOMM INC·Filed 2007·Granted Oct 26, 2010·7 cites·17 claims
- 3467US10474462B2Dynamic pipeline throttling using confidence-based weighting of in-flight branch instructionsQUALCOMM INC·Filed 2016·Granted Nov 12, 2019·1 cites·30 claims
- 3567US7721067B2Translation lookaside buffer manipulationQUALCOMM INC·Filed 2006·Granted May 18, 2010·4 cites·22 claims
- 3666US9223384B2Synthesizing intermediate performance levels in integrated circuits, and related processor systems, methods, and computer-readable mediaQUALCOMM INC·Filed 2013·Granted Dec 29, 2015·2 cites·42 claims
- 3766US7650466B2Method and apparatus for managing cache partitioning using a dynamic boundaryQUALCOMM INC·Filed 2005·Granted Jan 19, 2010·3 cites·24 claims
- 3866US7242600B2Circuit and method for subdividing a CAMRAM bank by controlling a virtual groundQUALCOMM INC·Filed 2005·Granted Jul 10, 2007·6 cites·21 claims
- 3966US6948053B2Efficiently calculating a branch target addressIBM·Filed 2002·Granted Sep 20, 2005·11 cites·41 claims
- 4064US7725625B2Latency insensitive FIFO signaling protocolQUALCOMM INC·Filed 2008·Granted May 25, 2010·2 cites·20 claims
- 4164US5450560APointer for use with a buffer and method of operationMOTOROLA INC·Filed 1992·Granted Sep 12, 1995·42 cites·15 claims
- 4263US8661229B2Power efficient instruction prefetch mechanismSARTORIUS THOMAS ANDREW·Filed 2009·Granted Feb 25, 2014·2 cites·20 claims
- 4363US6816962B2Re-encoding illegal OP codes into a single illegal OP code to accommodate the extra bits associated with pre-decoded instructionsIBM·Filed 2002·Granted Nov 9, 2004·9 cites·16 claims
- 4462US9710269B2Early conditional selection of an operandDIEFFENDERFER JAMES NORRIS·Filed 2006·Granted Jul 18, 2017·2 cites·28 claims
- 4561US9128720B2Methods and apparatus for voltage scalingMICHALAK GERALD PAUL·Filed 2011·Granted Sep 8, 2015·1 cites·25 claims
- 4661US7263577B2Power saving methods and apparatus to selectively enable comparators in a CAM renaming register file based on known processor stateQUALCOMM INC·Filed 2005·Granted Aug 28, 2007·2 cites·20 claims
- 4759US7568070B2Instruction cache having fixed number of variable length instructionsQUALCOMM INC·Filed 2005·Granted Jul 28, 2009·1 cites·20 claims
- 4859US7376815B2Methods and apparatus to insure correct predecodeQUALCOMM INC·Filed 2005·Granted May 20, 2008·1 cites·20 claims
- 4957US10551896B2Method and apparatus for dynamic clock and voltage scaling in a computer processor based on program phaseQUALCOMM INC·Filed 2017·Granted Feb 4, 2020·0 cites·36 claims
- 5057US6513134B1System and method for tracing program execution within a superscalar processorIBM·Filed 1999·Granted Jan 28, 2003·30 cites·26 claims
Showing the top 50 of 66 patent records by PatentIndex Score.
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