Inventor

LU CHI-YU

TW88 patents

⚠️ This page may combine multiple inventors who share the name “LU CHI-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LU CHI-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Power rail with non-linear edge

Method for generating layout diagram including cell having pin patterns and semiconductor device based on same

Integrated circuit, system for and method of forming an integrated circuit

Metal cut optimization for standard cells

Power rail with non-linear edge

Cell structure having different poly extension lengths

Method for manufacturing a cell having pins and semiconductor device based on same

Integrated circuit, system for and method of forming an integrated circuit

Reduced area standard cell abutment configurations

Cell structures and semiconductor devices having same

Metal cut optimization for standard cells

Method and system for generating layout diagram for semiconductor device having engineering change order (ECO) cells

Cell structures and semiconductor devices having same

Standard-cell layout structure with horn power and smart metal cut

Integrated circuit, system for and method of forming an integrated circuit

Semiconductor device having power rail with non-linear edge

Method of making a semiconductor device with V2V rail

Integrated circuit, system for and method of forming an integrated circuit

Method for manufacturing a cell having pins and semiconductor device based on same

Integrated circuit, system for and method of forming an integrated circuit

Integrated circuit, system for and method of forming an integrated circuit

Semiconductor device with V2V rail and methods of making same

Method of forming an integrated circuit

Integrated circuit, system for and method of forming an integrated circuit

Integrated circuit

Semiconductor cell and active area arrangement

Semiconductor metal layer structure over cell region

Integrated circuit having fins crossing cell boundary

Method of making amphi-FET structure and method of designing

Arrangement of source or drain conductors of transistor

Integrated circuit

Reduced area standard cell abutment configurations

Method and system for generating layout diagram including wiring arrangement

Method of making semiconductor device having self-aligned interconnect structure

System and method for generating layout diagram including wiring arrangement

Standard-cell layout structure with horn power and smart metal cut

Semiconductor device including frontside power mesh and backside power mesh and manufacturing method thereof

Metal cut optimization for standard cells

Source/drain isolation structure, layout, and method

Method of making amphi-FET structure and method of designing

Isolation circuit between power domains

Integrated circuit having fins crossing cell boundary

Arrangement of source or drain conductors of transistor

Semiconductor device having self-aligned interconnect structure and method of making

System for generating layout diagram including wiring arrangement

JUNIPER NETWORKS INC

Pipeline scheduler with fairness and minimum bandwidth guarantee

Pipeline scheduler with fairness and minimum bandwidth guarantee

Pipeline scheduler with fairness and minimum bandwidth guarantee

FAN RUIXUE

Pipeline scheduler with fairness and minimum bandwidth guarantee

VIKING TECH CORP

Micro-resistance structure with high bending strength, manufacturing method and semi-finished structure thereof