Inventor

JOSEPH ERIC A

US88 patents

⚠️ This page may combine multiple inventors who share the name “JOSEPH ERIC A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JOSEPH ERIC A

IBM

Phase change material with filament electrode

Phase change memory cell with electrode

Sputter and surface modification etch processing for metal patterning in integrated circuits

Selective sputtering with light mass ions to sharpen sidewall of subtractively patterned conductive metal layer

Low resistance metal contacts to interconnects

Self-aligned pitch split for unidirectional metal wiring

Subtractive plasma etching of a blanket layer of metal or metal alloy

Small footprint phase change memory cell

Phase change memory device with plated phase change material

Pore phase change material cell fabricated from recessed pillar

Spin torque MRAM fabrication using negative tone lithography and ion beam etching

Phase change memory with tapered heater

Phase change memory with tapered heater

Directed self-assembly for copper patterning

Thin film interconnects with large grains

Hybrid subtractive etch/metal fill process for fabricating interconnects

Interconnects fabricated by hydrofluorocarbon gas-assisted plasma etch

Low resistance metal contacts to interconnects

High aspect ratio patterning of hard mask materials by organic soft masks

Hybrid subtractive etch/metal fill process for fabricating interconnects

Spin torque MRAM fabrication using negative tone lithography and ion beam etching

Nano deposition and ablation for the repair and fabrication of integrated circuits

Interconnects based on subtractive etching of silver

Sputter etch processing for heavy metal patterning in integrated circuits

Sidewall image transfer for heavy metal patterning in integrated circuits

Etch rate enhancement for a silicon etch process through etch chamber pretreatment

Interconnects based on subtractive etching of silver

Sputter and surface modification etch processing for metal patterning in integrated circuits

Nanopore sensor device

Silicide micromechanical device and methods to fabricate same

Nanopore sensor device

BREITWISCH MATTHEW J

Method to reduce a via area in a phase change memory cell

In via formed phase change memory cell with recessed pillar heater

Small footprint phase change memory cell

In via formed phase change memory cell with recessed pillar heater

Flat lower bottom electrode for phase change memory cell

Flat lower bottom electrode for phase change memory cell

SCHROTT ALEJANDRO G

Pore phase change material cell fabricated from recessed pillar

Pore phase change material cell fabricated from recessed pillar

Nanoscale electrodes for phase change memory devices

TEXAS INSTRUMENTS INC

Polysilicon processing using an anti-reflective dual layer hardmask for 193 nm lithography

Polysilicon processing using an anti-reflective dual layer hardmask for 193 nm lithography

ASSEFA SOLOMON

Pillar-based interconnects for magnetoresistive random access memory

Pillar-based interconnects for magnetoresistive random access memory

GLOBALFOUNDRIES INC

Patterning transition metals in integrated circuits

Sputter and surface modification etch processing for metal patterning in integrated circuits

GUILLORN MICHAEL A

Methods to fabricate silicide micromechanical device

CHANG JOSEPHINE B

Field effect transistor having nanostructure channel

CABRAL JR CYRIL

Interconnect structure for improved time dependent dielectric breakdown

FULLER NICHOLAS C M

High aspect ratio and reduced undercut trench etch process for a semiconductor substrate