Inventor
CHANG CHI-HSUEN
TW7 patents
Patents
7 patentsUS7301185B2Nov 27, 2007
High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage
TAIWAN SEMICONDUCTOR MFG34 citations90
US7205630B2Apr 17, 2007
Method and apparatus for a semiconductor device having low and high voltage transistors
TAIWAN SEMICONDUCTOR MFG27 citations90
US7521741B2Apr 21, 2009
Shielding structures for preventing leakages in high voltage MOS devices
TAIWAN SEMICONDUCTOR MFG9 citations82
US7436043B2Oct 14, 2008
N-well and N+ buried layer isolation by auto doping to reduce chip size
TAIWAN SEMICONDUCTOR MFG7 citations71
US7498653B2Mar 3, 2009
Semiconductor structure for isolating integrated circuits of various operating voltages
TAIWAN SEMICONDUCTOR MFG3 citations61
US7196392B2Mar 27, 2007
Semiconductor structure for isolating integrated circuits of various operation voltages
TAIWAN SEMICONDUCTOR MFG5 citations60
US7253114B2Aug 7, 2007
Self-aligned method for defining a semiconductor gate oxide in high voltage device area
TAIWAN SEMICONDUCTOR MFG6 citations59