Inventor

CHANDRASEKHARAN KARTHIK

US7 patents

⚠️ This page may combine multiple inventors who share the name “CHANDRASEKHARAN KARTHIK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DJAJA GREGORY

2 patents

US8085076B2Dec 27, 2011

Data retention flip flop for low power applications

DJAJA GREGORY34 citations89

US8076965B2Dec 13, 2011

Low leakage data retention flip flop

DJAJA GREGORY10 citations80

Chen hua-feng

1 patent

US8514108B2Aug 20, 2013

Single stage and scalable serializer

Chen hua-feng6 citations78

AVAGO TECHNOLOGIES GENERAL IP

1 patent

US9667251B1May 30, 2017

Charge steering latch for low soft error rate

AVAGO TECHNOLOGIES GENERAL IP5 citations67

CHANDRASEKHARAN KARTHIK

1 patent

US8723548B2May 13, 2014

Hysteresis-based latch design for improved soft error rate with low area/performance overhead

CHANDRASEKHARAN KARTHIK3 citations52

BROADCOM CORP

1 patent

US9143164B2Sep 22, 2015

Scalable serializer

BROADCOM CORP0 citations49

AVAGO TECH INT SALES PTE LID

1 patent

US10491218B2Nov 26, 2019

Clocked miller latch design for improved soft error rate

AVAGO TECH INT SALES PTE LID0 citations46