Inventor

SAKASHITA KAZUHIRO

JP27 patents

⚠️ This page may combine multiple inventors who share the name “SAKASHITA KAZUHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAKASHITA KAZUHIRO

MITSUBISHI ELECTRIC CORP

Scan path system and an integrated circuit device using the same

Semiconductor integrated circuit device comprising scan paths having individual controllable bypasses

Semiconductor apparatus including semiconductor integrated circuit and operating method thereof

Integrated circuit device comprising a plurality of functional modules each performing predetermined function

Master-slave bistable latch with clock input control

Scan test circuit and semiconductor integrated circuit device using the same

Semiconductor integrated device with an improved performance

Circuit for transparent scan path testing of integrated circuit devices

Semiconductor integrated circuit device having input/output buffer cells each comprising a plurality of transistor regions arranged in a single line

Semiconductor intergrated circuit device

Semiconductor integrated circuit device

Integrated circuit device having a geometry to enhance fabrication and testing and manufacturing method thereof

Semiconductor integrated circuit having annular power supply with plural lines

Semiconductor integrated circuit and method of designing same

Semiconductor integrated circuit device having rest function

Method of manufacturing a semiconductor integrated circuit device, and an electronic circuit device

Semiconductor integrated circuit

Parallel multiplier circuit using matrices, including half and full adders

Semiconductor integrated circuit apparatus

Integrated circuit device and method of designing same

Semiconductor memory device with a controlled precharging arrangement

Bit-slice processing unit having M CPU&#39;s reading an N-bit width data element stored bit-sliced across M memories

Multiplication circuit with storing means

Programmable logic array with reduced product term line voltage swing to speed operation

Semiconductor memory device

TOKYO METRO IND TECH RES INST

Rocker bogie

SAKASHITA KAZUHIRO

Broadcast receiving device and program selecting method

Bit-slice processing unit having M CPU's reading an N-bit width data element stored bit-sliced across M memories