Inventor
BAKER FRANK K
US17 patents
Patents
17 patentsUS5712501AJan 27, 1998
Graded-channel semiconductor device
MOTOROLA INC187 citations98
US5485420AJan 16, 1996
Static-random-access memory cell and an integrated circuit having a static-random-access memory cell
MOTOROLA INC53 citations96
US4978626ADec 18, 1990
LDD transistor process having doping sensitive endpoint etching
MOTOROLA INC83 citations96
US5037777AAug 6, 1991
Method for forming a multi-layer semiconductor device using selective planarization
MOTOROLA INC69 citations95
US4852062AJul 25, 1989
EPROM device using asymmetrical transistor characteristics
MOTOROLA INC98 citations95
US5377139ADec 27, 1994
Process forming an integrated circuit
MOTOROLA INC29 citations92
US5101257AMar 31, 1992
Semiconductor device having merged bipolar and MOS transistors and process for making the same
MOTOROLA INC24 citations92
US5082794AJan 21, 1992
Method of fabricating mos transistors using selective polysilicon deposition
MOTOROLA INC48 citations92
US5024971AJun 18, 1991
Method for patterning submicron openings using an image reversal layer of material
MOTOROLA INC45 citations92
US4984042AJan 8, 1991
MOS transistors using selective polysilicon deposition
MOTOROLA INC22 citations92
US5661048AAug 26, 1997
Method of making an insulated gate semiconductor device
MOTOROLA INC23 citations91
US5541132AJul 30, 1996
Insulated gate semiconductor device and method of manufacture
MOTOROLA INC46 citations89
US5275964AJan 4, 1994
Method for compactly laying out a pair of transistors
MOTOROLA INC6 citations74
US4811066AMar 7, 1989
Compact multi-state ROM cell
MOTOROLA INC9 citations74
US5536674AJul 16, 1996
Process for forming a static-random-access memory cell
MOTOROLA INC16 citations73
US4801555AJan 31, 1989
Double-implant process for forming graded source/drain regions
MOTOROLA INC15 citations71
US5243203ASep 7, 1993
Compact transistor pair layout and method thereof
MOTOROLA INC2 citations63