Inventor

SORANI IRIS

IL6 patents

⚠️ This page may combine multiple inventors who share the name “SORANI IRIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NAVEH ALON

2 patents

US8281083B2Oct 2, 2012

Device, system and method of generating an execution instruction based on a memory-access instruction

NAVEH ALON3 citations58

US9063729B2Jun 23, 2015

Device, system and method of generating an execution instruction based on a memory-access instruction

NAVEH ALON0 citations48

INTEL CORP

2 patents

US9239789B2Jan 19, 2016

Method and apparatus for monitor and MWAIT in a distributed cache architecture

INTEL CORP1 citations51

US9720843B2Aug 1, 2017

Access type protection of memory reserved for use by processor logic

INTEL CORP0 citations40

OFFEN ZEEV

1 patent

US9081687B2Jul 14, 2015

Method and apparatus for MONITOR and MWAIT in a distributed cache architecture

OFFEN ZEEV8 citations81

SORANI IRIS

1 patent

US9830272B2Nov 28, 2017

Cache memory staged reopen

SORANI IRIS7 citations77