Inventor
DUSCHATKO DOUGLAS E
US10 patents
⚠️ This page may combine multiple inventors who share the name “DUSCHATKO DOUGLAS E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CISCO TECH IND
6 patentsUS6982974B1Jan 3, 2006
Method and apparatus for a rearrangeably non-blocking switching matrix
CISCO TECH IND277 citations97
US6934305B1Aug 23, 2005
Method and apparatus for detecting errors in a backplane frame
CISCO TECH IND58 citations94
US6983414B1Jan 3, 2006
Error insertion circuit for SONET forward error correction
CISCO TECH IND41 citations92
US6973041B1Dec 6, 2005
Path AIS insertion for concatenated payloads across multiple processors
CISCO TECH IND17 citations82
US6801548B1Oct 5, 2004
Channel ordering for communication signals split for matrix switching
CISCO TECH IND12 citations72
US6735197B1May 11, 2004
Concatenation detection across multiple chips
CISCO TECH IND8 citations72
CYRIX CORP
2 patentsUS5524234AJun 4, 1996
Coherency for write-back cache in a system designed for write-through cache including write-back latency control
CYRIX CORP60 citations95
US5572682ANov 5, 1996
Control logic for a sequential data buffer using byte read-enable lines to define and shift the access window
CYRIX CORP14 citations73