Inventor

HERUBIN MARGARET R

US18 patents

⚠️ This page may combine multiple inventors who share the name “HERUBIN MARGARET R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HERUBIN MARGARET R

NAT SEMICONDUCTOR CORP

Method of invoking a low power mode in a computer system using a halt instruction

Computer system with low power mode invoked by halt instruction

Coherency for write-back cache in a system designed for write-through cache including export-on-hold

Instruction-initiated power management method for a pipelined data processor

Signal-initiated method for suspending operation of a pipelined data processor

Pipelined data processor with signal-initiated power management control

Method for controlling power of a microprocessor by asserting and de-asserting a control signal in response conditions associated with the microprocessor entering and exiting low power state respectively

Signal-initiated power management method for a pipelined data processor

System for controlling power of a microprocessor by asserting and de-asserting a control signal in response to condition associated with the microprocessor entering and exiting low power state respectively

Power management method for a pipelined computer system

Pipelined data processor with instruction-initiated power management control

Pipelined computer system with power management control

Instruction-initiated method for suspending operation of a pipelined data processor

CYRIX CORP

Microprocessor having power management circuitry with coprocessor support

Microprocessor with externally controllable power management

Coherency for write-back cache in a system designed for write-through cache including write-back latency control

Coherency for write-back cache in a system designed for write-through cache using an export/invalidate protocol

Microprocessor for selectively configuring pinout by activating tri-state device to disable internal clock from external pin