Inventor
CHOO HSIA LIANG
SG3 patents
Patents
3 patentsUS6998335B2Feb 14, 2006
Structure and method for fabricating a bond pad structure
CHARTERED SEMICONDUCTOR MFG39 citations87
US7276797B2Oct 2, 2007
Structure and method for fabricating a bond pad structure
CHARTERED SEMICONDUCTOR MFG12 citations79
US7148157B2Dec 12, 2006
Use of phoslon (PNO) for borderless contact fabrication, etch stop/barrier layer for dual damascene fabrication and method of forming phoslon
CHARTERED SEMICONDUCTOR MFG3 citations60