Inventor

TRAN ARNOLD S

US7 patents

⚠️ This page may combine multiple inventors who share the name “TRAN ARNOLD S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

4 patents

US7962695B2Jun 14, 2011

Method and system for integrating SRAM and DRAM architecture in set associative cache

IBM14 citations83

US5319761AJun 7, 1994

Directory look-aside table for a virtual storage system including means for minimizing synonym entries

IBM13 citations70

US8024513B2Sep 20, 2011

Method and system for implementing dynamic refresh protocols for DRAM based cache

IBM5 citations62

US7882302B2Feb 1, 2011

Method and system for implementing prioritized refresh of DRAM based cache

IBM5 citations62

CANTIN JASON F

1 patent

US9201654B2Dec 1, 2015

Processor and data processing method incorporating an instruction pipeline with conditional branch direction prediction for fast access to branch target instructions

CANTIN JASON F4 citations72

BARTH JOHN E

1 patent

US8108609B2Jan 31, 2012

Structure for implementing dynamic refresh protocols for DRAM based cache

BARTH JOHN E5 citations57

CHADWICK JR THOMAS B

1 patent

US8667223B2Mar 4, 2014

Shadow registers for least recently used data in cache

CHADWICK JR THOMAS B2 citations55