Inventor · disambiguated record
Eric Palmer
Also filed as: PALMER ERIC · PALMER ERIC C · PALMER ERIC CLARK
9 granted patents·3 pending applications·226 citations·filing 2003–2024
89Inventor score
Top patents by PatentIndex Score
12 records- 0196US8188594B2Input/output package architecturesGANESAN SANKA·Filed 2009·Granted May 29, 2012·59 cites·22 claims
- 0294US8093704B2Package on package using a bump-less build up layer (BBUL) packagePALMER ERIC C·Filed 2008·Granted Jan 10, 2012·69 cites·10 claims
- 0390US7705447B2Input/output package architectures, and methods of using sameINTEL CORP·Filed 2008·Granted Apr 27, 2010·19 cites·35 claims
- 0489US7183653B2Via including multiple electrical pathsINTEL CORP·Filed 2003·Granted Feb 27, 2007·62 cites·28 claims
- 0572US7952202B2Method of embedding passive component within viaINTEL CORP·Filed 2007·Granted May 31, 2011·4 cites·11 claims
- 0665US9960079B2Passive within viaINTEL CORP·Filed 2013·Granted May 1, 2018·1 cites·11 claims
- 0765US7275316B2Method of embedding passive component within viaINTEL CORP·Filed 2004·Granted Oct 2, 2007·9 cites·13 claims
- 0861US7737025B2Via including multiple electrical pathsINTEL CORP·Filed 2007·Granted Jun 15, 2010·2 cites·14 claims
- 0961US2025005720A1Resizing for enhanced inferenceINTEL CORP·Filed 2024·Application pending·0 cites
- 1058US8487446B2Method of embedding passive component within viaMYERS TODD B·Filed 2011·Granted Jul 16, 2013·1 cites·11 claims
- 1148US2010077529A1Article, laminate and associated methodsGEN ELECTRIC·Filed 2009·Application pending·0 cites
- 1235US2005121769A1Stacked integrated circuit packages and methods of making the packagesFiled 2003·Application pending·0 cites
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