Inventor
YABE YOSHIKAZU
JP13 patents
⚠️ This page may combine multiple inventors who share the name “YABE YOSHIKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NEC CORP
9 patentsUS6263413B1Jul 17, 2001
Memory integrated circuit and main memory and graphics memory systems applying the above
NEC CORP117 citations97
US6414880B1Jul 2, 2002
Multiple line buffer type memory LSI
NEC CORP20 citations92
US6490669B1Dec 3, 2002
Memory LSI with compressed data inputting and outputting function
NEC CORP26 citations91
US6034911AMar 7, 2000
Semiconductor memory device for a rapid random access
NEC CORP14 citations73
US6556484B2Apr 29, 2003
Plural line buffer type memory LSI
NEC CORP4 citations62
US5845312ADec 1, 1998
System for accessing dynamic random access memory where the logic/control circuit temporarily stops upon word line switching
NEC CORP4 citations62
US5815442ASep 29, 1998
Data transfer apparatus with large noise margin and reduced power dissipation
NEC CORP2 citations62
US5714893AFeb 3, 1998
Signal transmission circuit
NEC CORP4 citations62
US6118718ASep 12, 2000
Semiconductor memory device in which a BIT line pair having a high load is electrically separated from a sense amplifier
NEC CORP3 citations61
NEC ELECTRONICS CORP
2 patentsUS7752420B2Jul 6, 2010
Configuration layout number controlled adjustable delaying of connection path changes among processors in array to reduce transition glitches
NEC ELECTRONICS CORP9 citations80
US7523292B2Apr 21, 2009
Array-type processor having state control units controlling a plurality of processor elements arranged in a matrix
NEC ELECTRONICS CORP2 citations62