Inventor
PRANATHARTHI HARAN BALASUBRAMANIAN S
US18 patents
⚠️ This page may combine multiple inventors who share the name “PRANATHARTHI HARAN BALASUBRAMANIAN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS9741609B1Aug 22, 2017
Middle of line cobalt interconnection
IBM22 citations94
US10600638B2Mar 24, 2020
Nanosheet transistors with sharp junctions
IBM6 citations84
US7544610B2Jun 9, 2009
Method and process for forming a self-aligned silicide contact
IBM14 citations82
US11164782B2Nov 2, 2021
Self-aligned gate contact compatible cross couple contact formation
IBM2 citations73
US11133217B1Sep 28, 2021
Late gate cut with optimized contact trench size
IBM2 citations73
US9704991B1Jul 11, 2017
Gate height and spacer uniformity
IBM2 citations73
US7914970B2Mar 29, 2011
Mixed lithography with dual resist and a single pattern transfer
IBM6 citations72
US11171054B2Nov 9, 2021
Selective deposition with SAM for fully aligned via
IBM3 citations70
US11430651B2Aug 30, 2022
Nanosheet transistors with sharp junctions
IBM0 citations62
US11355633B2Jun 7, 2022
Vertical field effect transistor with bottom source-drain region
IBM0 citations62
US11189528B2Nov 30, 2021
Subtractive RIE interconnect
IBM1 citations62
US11152464B1Oct 19, 2021
Self-aligned isolation for nanosheet transistor
IBM1 citations62
US7501345B1Mar 10, 2009
Selective silicide formation by electrodeposit displacement reaction
IBM5 citations61
US10586741B2Mar 10, 2020
Gate height and spacer uniformity
IBM0 citations52
US11302637B2Apr 12, 2022
Interconnects including dual-metal vias
IBM0 citations50