Inventor
HSU JUN CHUNG
US23 patents
⚠️ This page may combine multiple inventors who share the name “HSU JUN CHUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
APPLE INC
15 patentsUS9721903B2Aug 1, 2017
Vertical interconnects for self shielded system in package (SiP) modules
APPLE INC31 citations92
US10115677B2Oct 30, 2018
Vertical interconnects for self shielded system in package (SiP) modules
APPLE INC5 citations82
US9305853B2Apr 5, 2016
Ultra fine pitch PoP coreless package
APPLE INC4 citations73
US9899239B2Feb 20, 2018
Carrier ultra thin substrate
APPLE INC6 citations72
US10522475B2Dec 31, 2019
Vertical interconnects for self shielded system in package (SiP) modules
APPLE INC4 citations71
US11862597B2Jan 2, 2024
Asymmetric stackup structure for SoC package substrates
APPLE INC2 citations69
US10535611B2Jan 14, 2020
Substrate-less integrated components
APPLE INC1 citations61
US11908819B2Feb 20, 2024
Semiconductor packaging substrate fine pitch metal bump and reinforcement structures
APPLE INC0 citations59
US11545455B2Jan 3, 2023
Semiconductor packaging substrate fine pitch metal bump and reinforcement structures
APPLE INC1 citations59
US12322721B2Jun 3, 2025
Asymmetric Stackup Structure for SoC package substrates
APPLE INC0 citations58
US10991659B2Apr 27, 2021
Substrate-less integrated components
APPLE INC0 citations57
US9570367B2Feb 14, 2017
Ultra fine pitch PoP coreless package
APPLE INC0 citations52
US9633953B2Apr 25, 2017
Methodology to achieve zero warpage for IC package
APPLE INC1 citations51
US10109593B2Oct 23, 2018
Self shielded system in package (SiP) modules
APPLE INC1 citations50
US12494433B2Dec 9, 2025
3D embedded redistribution layers for IC substrate packaging
APPLE INC0 citations41
KINSUS INTERCONNECT TECH CORP
7 patentsUS7768131B1Aug 3, 2010
Package structure preventing solder overflow on substrate solder pads
KINSUS INTERCONNECT TECH CORP8 citations76
US7662662B2Feb 16, 2010
Method for manufacturing carrier substrate
KINSUS INTERCONNECT TECH CORP2 citations55
US7805835B2Oct 5, 2010
Method for selectively processing surface tension of solder mask layer in circuit board
KINSUS INTERCONNECT TECH CORP3 citations54
US8547548B1Oct 1, 2013
Final defect inspection system
KINSUS INTERCONNECT TECH CORP1 citations43
US8754328B2Jun 17, 2014
Laminate circuit board with a multi-layer circuit structure
KINSUS INTERCONNECT TECH CORP0 citations38
US8837808B2Sep 16, 2014
Method of final defect inspection
KINSUS INTERCONNECT TECH CORP0 citations37
US9351409B2May 24, 2016
Method of manufacturing a thin support package structure
KINSUS INTERCONNECT TECH CORP0 citations30