P

Inventor

HUANG CHENG-CHIH

TW21 patents
⚠️ This page may combine multiple inventors who share the name “HUANG CHENG-CHIH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NANYA TECHNOLOGY CORP

16 patents
US6800895B2Oct 5, 2004

Vertical split gate flash memory cell and method for fabricating the same

NANYA TECHNOLOGY CORP21 citations92
US6794250B2Sep 21, 2004

Vertical split gate flash memory cell and method for fabricating the same

NANYA TECHNOLOGY CORP25 citations92
US7948027B1May 24, 2011

Embedded bit line structure, field effect transistor structure with the same and method of fabricating the same

NANYA TECHNOLOGY CORP16 citations82
US6800526B2Oct 5, 2004

Method for manufacturing a self-aligned split-gate flash memory cell

NANYA TECHNOLOGY CORP11 citations74
US6773993B2Aug 10, 2004

Method for manufacturing a self-aligned split-gate flash memory cell

NANYA TECHNOLOGY CORP10 citations74
US7078748B2Jul 18, 2006

Multi-layer gate stack structure comprising a metal layer for a FET device, and method for fabricating the same

NANYA TECHNOLOGY CORP9 citations71
US7074700B2Jul 11, 2006

Method for isolation layer for a vertical DRAM

NANYA TECHNOLOGY CORP8 citations71
US6673676B2Jan 6, 2004

Method of fabricating a flash memory cell

NANYA TECHNOLOGY CORP2 citations63
US7476923B2Jan 13, 2009

Memory device and fabrication thereof

NANYA TECHNOLOGY CORP2 citations62
US7342274B2Mar 11, 2008

Memory cells with vertical transistor and capacitor and fabrication methods thereof

NANYA TECHNOLOGY CORP2 citations62
US7858470B2Dec 28, 2010

Memory device and fabrication thereof

NANYA TECHNOLOGY CORP0 citations51
US7553723B2Jun 30, 2009

Manufacturing method of a memory device

NANYA TECHNOLOGY CORP1 citations51
US7445986B2Nov 4, 2008

Memory cells with vertical transistor and capacitor and fabrication methods thereof

NANYA TECHNOLOGY CORP0 citations51
US6927123B2Aug 9, 2005

Method for forming a self-aligned buried strap in a vertical memory cell

NANYA TECHNOLOGY CORP1 citations51
US6897108B2May 24, 2005

Process for planarizing array top oxide in vertical MOSFET DRAM arrays

NANYA TECHNOLOGY CORP1 citations51
US6962847B2Nov 8, 2005

Method for forming a self-aligned buried strap in a vertical memory cell

NANYA TECHNOLOGY CORP0 citations40

QISDA CORP

4 patents

HUANG CHENG CHIH

1 patent