Inventor
CHEN KAIYU
US12 patents
⚠️ This page may combine multiple inventors who share the name “CHEN KAIYU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
8 patentsUS10360654B1Jul 23, 2019
Software scoreboard information and synchronization
INTEL CORP16 citations91
US10282227B2May 7, 2019
Efficient preemption for graphics processors
INTEL CORP7 citations84
US10515431B2Dec 24, 2019
Global optimal path determination utilizing parallel processing
INTEL CORP2 citations70
US10699362B2Jun 30, 2020
Divergent control flow for fused EUs
INTEL CORP2 citations67
US12174783B2Dec 24, 2024
Systolic array of arbitrary physical and logical depth
INTEL CORP0 citations62
US10565670B2Feb 18, 2020
Graphics processor register renaming mechanism
INTEL CORP1 citations62
US10692170B2Jun 23, 2020
Software scoreboard information and synchronization
INTEL CORP0 citations49
US10636112B2Apr 28, 2020
Graphics processor register data re-use mechanism
INTEL CORP0 citations41
ALPHA & OMEGA SEMICONDUCTOR
2 patentsUS7585705B2Sep 8, 2009
Method for preventing gate oxide damage of a trench MOSFET during wafer processing while adding an ESD protection module atop
ALPHA & OMEGA SEMICONDUCTOR8 citations80
US7728385B2Jun 1, 2010
Trench MOSFET with an ONO insulating layer sandwiched between an ESD protection module atop and a semiconductor substrate
ALPHA & OMEGA SEMICONDUCTOR4 citations70