Inventor
PATLOLLA RAGHUVEER REDDY
US6 patents
Patents
6 patentsUS11664271B2May 30, 2023
Dual damascene with short liner
IBM0 citations61
US11037795B2Jun 15, 2021
Planarization of dielectric topography and stopping in dielectric
IBM0 citations60
US12107008B2Oct 1, 2024
Maskless alignment scheme for BEOL memory array manufacturing
IBM0 citations50
US11637036B2Apr 25, 2023
Planarization stop region for use with low pattern density interconnects
IBM0 citations50
US11164878B2Nov 2, 2021
Interconnect and memory structures having reduced topography variation formed in the BEOL
IBM0 citations50
US10916431B2Feb 9, 2021
Robust gate cap for protecting a gate from downstream metallization etch operations
IBM0 citations46