Inventor

TSAIR YONG-SHIUAN

TW58 patents

⚠️ This page may combine multiple inventors who share the name “TSAIR YONG-SHIUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSAIR YONG-SHIUAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Embedded ferroelectric memory cell

Embedded ferroelectric memory cell

Method for manufacturing memory device having spacer

Strap-cell architecture for embedded memory

Architecture to improve cell size for compact array of split gate flash cell with buried common source structure

Embedded ferroelectric memory cell

Polysilicon resistor structures

Integrated circuit and method for fabricating the same

Polysilicon resistor structures

Integrated chip and method of forming thereof

Floating gate test structure for embedded memory device

Semiconductor structure and fabricating method thereof

Method to improve memory cell erasure

High endurance non-volatile memory cell

Control gate strap layout to improve a word line etch process window

Device-region layout for embedded flash

Control gate strap layout to improve a word line etch process window

RRAM structure

Semiconductor device and manufacturing method thereof

Non-volatile memory semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Embedded ferroelectric memory cell

Integrated chip and method of forming thereof

Method and structures pertaining to improved ferroelectric random-access memory (FeRAM)

Method for forming an integrated circuit and an integrated circuit

Polysilicon resistor structures

Integrated circuit

High voltage transistor structures

Strap-cell architecture for embedded memory

Floating gate test structure for embedded memory device

Device-region layout for embedded flash

High voltage transistor structure

Semiconductor device and manufacturing method thereof

Strap-cell architecture for embedded memory

Floating gate test structure for embedded memory device

Device-region layout for embedded flash

Semiconductor device and manufacturing method thereof

Strap-cell architecture for embedded memory

Method to reduce kink effect in semiconductor devices

Non-volatile memory semiconductor device with electrostatic discharge protection, planarization layers, and manufacturing method thereof

Semiconductor device and manufacturing method thereof

Memory device having two memory stacks over one bottom electrode

Memory structure

Semiconductor device and manufacturing method thereof

Method of forming a semiconductor device with a dual gate dielectric layer having middle portion thinner than the edge portions

TAIWAN SEMICONDUCTOR MFG

Methods and apparatus for non-volatile memory cells with increased programming efficiency

Method of forming a logic compatible flash memory

Architecture to improve cell size for compact array of split gate flash cell

Methods and apparatus for non-volatile memory cells with increased programming efficiency