Inventor

JACK NATHAN D

US6 patents

⚠️ This page may combine multiple inventors who share the name “JACK NATHAN D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

3 patents

US10756078B2Aug 25, 2020

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

IBM0 citations51

US10181463B2Jan 15, 2019

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

IBM0 citations51

US9620497B2Apr 11, 2017

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

IBM0 citations51

INTEL CORP

2 patents

US12598814B2Apr 7, 2026

Lateral diodes in stacked transistor technologies

INTEL CORP0 citations59

US11264405B2Mar 1, 2022

Semiconductor diodes employing back-side semiconductor or metal

INTEL CORP0 citations50

DI SARRO JAMES P

1 patent

US9219055B2Dec 22, 2015

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

DI SARRO JAMES P3 citations57