Inventor

SEL JONG-SUN

KR41 patents

⚠️ This page may combine multiple inventors who share the name “SEL JONG-SUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SEL JONG-SUN

SAMSUNG ELECTRONICS CO LTD

NAND flash memory device having dummy memory cells and methods of operating same

NAND flash memory device having dummy memory cells and methods of operating same

Integrated circuit layout and a semiconductor device manufactured using the same

Non-volatile memory devices including dummy word lines and related structures and methods

Non-volatile memory device and method of fabricating the same

Semiconductor device having a gate contact structure capable of reducing interfacial resistance and method of forming the same

Methods of forming nonvolatile memory devices

Semiconductor devices with sidewall conductive patterns methods of fabricating the same

Nonvolatile memory devices having a fin shaped active region and methods of fabricating the same

Semiconductor memory devices having dummy active regions

Semiconductor memory devices having dummy active regions

Nonvolatile memory devices having a fin shaped active region

Data line layout in semiconductor memory device and method of forming the same

Semiconductor memory devices having dummy active regions

Methods of fabricating semiconductor devices with sidewall conductive patterns

Non-volatile memory devices including fuse covered field regions

Cell array of semiconductor memory device and a method of forming the same

Nonvolatile memory devices and methods of forming the same

Methods of fabricating flash memory devices having shared sub active regions

Non-volatile memory devices

Charge-trap nonvolatile memory devices

Flash memory devices having shared sub active regions

Nonvolatile memory devices

Data line layout in semiconductor memory device and method of forming the same

Semiconductor devices with sidewall conductive patterns and methods of fabricating the same

Non-volatile memory devices including fuse covered field regions

Method of forming semiconductor devices in which a cell gate pattern and a resistor pattern are formed of a same material

SEL JONG-SUN

Non-volatile memory devices

Methods of forming non-volatile memory devices including dummy word lines

Methods of fabricating flash memory devices having shared sub active regions

Semiconductor memory devices

Cell array of semiconductor memory device and a method of forming the same

Semiconductor device including dummy

Intel NDTM US LLC

Additional silicide layer on top of staircase for 3D NAND WL contact connection

Block-to-block isolation and deep contact using pillars in a memory array

SANDISK TECHNOLOGIES INC

Air gap formation between bit lines with side protection

Air gap formation between bit lines with top protection

PARK KI-TAE

NAND flash memory device having dummy memory cells and methods of operating same

YUN SUNG-WON

Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof

SANDISK TECHNOLOGIES LLC

Memory hole structure in three dimensional memory

KANG CHANG-SEOK

Semiconductor device having a gate contact structure capable of reducing interfacial resistance