Inventor

AJIKA NATSUO

JP70 patents

⚠️ This page may combine multiple inventors who share the name “AJIKA NATSUO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AJIKA NATSUO

MITSUBISHI ELECTRIC CORP

Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor

Stacked-type semiconductor device

Multi-layered interconnection structure for a semiconductor device

Semiconductor device and a method of manufacturing thereof

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory device using trench isolation and manufacturing method thereof

Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor

Semiconductor device having capacitor and manufacturing method therefor

Stacked-type semiconductor device

Electrically programmable non-volatile semiconductor memory device and manufacturing method thereof

Multi-layered interconnection structure for a semiconductor device and manufactured method thereof

Content addressable memory device

Nonvolatile semiconductor memory device and method of fabricating the same

Non-volatile semiconductor memory device

Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor

Semiconductor device and a method of manufacturing thereof

Nonvolatile semiconductor memory device

Method of manufacturing stacked capacitors in a DRAM with reduced isolation region between adjacent capacitors

Nonvolatile semiconductor memory device having controlled charge pump load

Method of manufacturing a stacked capacitor in a dram

Nonvolatile semiconductor memory device having a memory cell transistor and a select transistor

Dynamic random access memory having stacked type capacitor and manufacturing method therefor

Method of manufacturing a semiconductor memory device with multiple device forming regions

Semiconductor device manufacturing apparatus

Method of manufacturing semiconductor device having interconnection layer contacting source/drain regions

Semiconductor memory device having a peripheral wall at the boundary region of a memory cell array region and a peripheral circuit region

Electrically programmable non-volatie semiconductor memory device

Semiconductor device having interconnection layer contacting source/drain regions

MIS-type semiconductor device of LDD structure and manufacturing method thereof

Method of manufacturing non-volatile semiconductor memory device

Nonvolatile semiconductor memory device operable at high speed with low power supply voltage while preventing overerasing/overwriting

Memory cell allowing write and erase with low voltage power supply and nonvolatile semiconductor memory device provided with the same

Nonvolatile semiconductor memory device operable at high speed with low power supply voltage while suppressing increase of chip area

Field effect transistor having impurity regions of different depths and manufacturing method thereof

Method of making memory cells with peripheral transistors

Field effect transistor having impurity regions of different depths and manufacturing method thereof

Semiconductor memory device and method of manufacturing the same

Semiconductor device

Non-volatile semiconductor memory device

Dynamic random access memory having stacked type capacitor and manufacturing method therefor

Field effect transistor having impurity regions of different depths and manufacturing method thereof

Non-volatile semiconductor memory device using contact hole connection

Nonvolatile semiconductor memory device and method of manufacturing the same

Method of manufacturing a semiconductor device having a capacitor

Semiconductor device including semiconductor layer having impurity region and method of manufacturing the same

Semiconductor device including semiconductor layer having impurity region and method of manufacturing the same

DRAM with memory cells having access transistor formed on solid phase epitaxial single crystalline layer and manufacturing method thereof

Method of making a semiconductor integrated device having gate sidewall structure

Nonvolatile semiconductor device and a method of manufacturing thereof

GENUSION INC

Nonvolatile semiconductor memory